utl/doc/latex/dir_b2ad3c1a6521a4924fa9194d98c323e2.tex

\hypertarget{dir_b2ad3c1a6521a4924fa9194d98c323e2}{}\section{include/utl/com Directory Reference}
\label{dir_b2ad3c1a6521a4924fa9194d98c323e2}\index{include/utl/com Directory Reference@{include/utl/com Directory Reference}}
\subsection*{Files}
\begin{DoxyCompactItemize}
\item 
file \mbox{\hyperlink{__1wire_8h}{\+\_\+1wire.\+h}}
\begin{DoxyCompactList}\small\item\em An 1-\/wire interface implementation. \end{DoxyCompactList}\item 
file \mbox{\hyperlink{__1wire__id_8h}{\+\_\+1wire\+\_\+id.\+h}}
\begin{DoxyCompactList}\small\item\em An 1-\/wire Rom ID type. \end{DoxyCompactList}\item 
file \mbox{\hyperlink{__1wire__uart_8h}{\+\_\+1wire\+\_\+uart.\+h}}
\begin{DoxyCompactList}\small\item\em A 1-\/wire implementation using a microprocessor\textquotesingle{}s uart for bit timing. \end{DoxyCompactList}\item 
file \mbox{\hyperlink{i2c_8h}{i2c.\+h}}
\begin{DoxyCompactList}\small\item\em An Abstract base class interface for the i2c bus. \end{DoxyCompactList}\item 
file \mbox{\hyperlink{i2c__bb_8h}{i2c\+\_\+bb.\+h}}
\begin{DoxyCompactList}\small\item\em A bit banking implementation of i2c bus inherited from i2c\+\_\+i base class. \end{DoxyCompactList}\item 
file \mbox{\hyperlink{spi_8h}{spi.\+h}}
\begin{DoxyCompactList}\small\item\em An Abstract base class interface for the spi bus. \end{DoxyCompactList}\item 
file \mbox{\hyperlink{spi__bb_8h}{spi\+\_\+bb.\+h}}
\begin{DoxyCompactList}\small\item\em A bit banking implementation of spi bus inherited from spi\+\_\+i base class. \end{DoxyCompactList}\end{DoxyCompactItemize}