34 class SPI :
public spi_bb_i<SPI, spi::cpol::LOW, spi::cpha::LOW> {
36 void MOSI (
bool st) { (void)st; }
37 bool MISO () {
return true; }
38 void SCLK (
bool st) { (void)st; }
39 void delay (uint32_t nsec) { (void)nsec; }
42 SPI (uint32_t clk =100000) noexcept :
65 uint8_t bb[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10};
66 uint8_t bbb[
sizeof bb];
72 EXPECT_EQ(spi.tx_data(bb, bbb,
sizeof(bb)),
sizeof (bb));
75 spi.rx_data(bbb,
sizeof bb);
76 for (
unsigned int i=0 ; i<
sizeof bb ; ++i) {
TEST_F(Test_spi_impl, TestConcept)
STL's core language concepts.
A bit banking implementation of spi bus inherited from spi_i base class.
A bit banking implementation of spi bus inherited from spi_i base class.
#define EXPECT_EQ(val1, val2)
SPI(uint32_t clk=100000) noexcept