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com/spi: constexpr rework

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This commit is contained in:
Christos Houtouridis 2018-10-28 22:25:51 +02:00
parent e662a3e94b
commit 5d1b3636f3
2 changed files with 41 additions and 21 deletions
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2
include/utl/com/spi.h
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@ -78,7 +78,7 @@ namespace utl {
spi_i () = default; //!< Allow constructor from derived only
~spi_i () = default; //!< Allow destructor from derived only
spi_i (const type&) = delete; //!< No copies
spi_i& operator= (const spi_i&) = delete;
type& operator= (const type&) = delete;
//!@}
/*!

52
include/utl/com/spi_bb.h
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@ -74,12 +74,18 @@ namespace utl {
private:
//! \name SPI implementation specific functions
//!@{
template <spi::cpol C =CPOL> constexpr bool clkHigh () { return !static_cast<bool>(C); }
template <spi::cpol C =CPOL> constexpr bool clkLow () { return static_cast<bool>(C); }
template <spi::bitOrder B =BitOrder> constexpr
use_if_t <(B == spi::bitOrder::LSB_First), void> shift (byte_t& b) { b <<=1; }
template <spi::bitOrder B =BitOrder> constexpr
use_if_t <(B == spi::bitOrder::MSB_First), void> shift (byte_t& b) { b >>=1; }
template <spi::cpol C =CPOL> static constexpr bool clkHigh () {
return !static_cast<bool>(C);
}
template <spi::cpol C =CPOL> static constexpr bool clkLow () {
return static_cast<bool>(C);
}
static constexpr bool clkH_ {clkHigh()};
static constexpr bool clkL_ {clkLow()};
//!}
/*!
@ -110,7 +116,11 @@ namespace utl {
use_if_t <(C == spi::cpha::LOW), byte_t> _tx_data_impl (byte_t out);
template <spi::cpha C =CPHA>
use_if_t <(C == spi::cpha::HIGH), byte_t> _tx_data_impl (byte_t out);
//!@}
//! Data members
//! @{
private:
uint32_t nsec_; //!< half period of SPI bus
//! @}
};
@ -127,14 +137,14 @@ namespace utl {
use_if_t <(C == spi::cpha::LOW), byte_t>
spi_bb_i<impl_t, CPOL, CPHA, BitOrder>::_tx_data_impl (byte_t out) {
byte_t in {};
SCLK (clkLow());
SCLK (clkL_);
for (uint8_t bit {static_cast<uint8_t>(BitOrder)} ; bit ; shift (bit)) {
MOSI (out & bit); // Out at preceding clock trailing edge
delay (nsec_); // Half cycle delay
SCLK (clkHigh()); // Leading edge
SCLK (clkH_); // Leading edge
in |= (MISO ()) ? bit : 0; // In at leading clock edge
delay (nsec_); // Half cycle delay
SCLK (clkLow()); // Trailing edge
SCLK (clkL_); // Trailing edge
}
return in;
}
@ -151,13 +161,13 @@ namespace utl {
use_if_t <(C == spi::cpha::HIGH), byte_t>
spi_bb_i<impl_t, CPOL, CPHA, BitOrder>::_tx_data_impl (byte_t out) {
byte_t in {};
SCLK (clkLow());
SCLK (clkL_);
for (uint8_t bit {static_cast<uint8_t>(BitOrder)} ; bit ; shift (bit)) {
delay (nsec_); // Half cycle delay
SCLK (clkHigh()); // Leading edge
SCLK (clkH_); // Leading edge
MOSI (out & bit); // Out at leading clock edge
delay (nsec_); // Half cycle delay
SCLK (clkLow()); // Trailing edge
SCLK (clkL_); // Trailing edge
in |= (MISO ()) ? bit : 0; // In at trailing clock edge
}
return in;
@ -196,12 +206,18 @@ namespace utl {
private:
//! \name SPI implementation specific functions
//!@{
template <spi::cpol C =CPOL> constexpr bool clkHigh () { return !static_cast<bool>(C); }
template <spi::cpol C =CPOL> constexpr bool clkLow () { return static_cast<bool>(C); }
template <spi::bitOrder B =BitOrder> constexpr
use_if_t <(B == spi::bitOrder::LSB_First), void> shift (byte_t& b) { b <<=1; }
template <spi::bitOrder B =BitOrder> constexpr
use_if_t <(B == spi::bitOrder::MSB_First), void> shift (byte_t& b) { b >>=1; }
template <spi::cpol C =CPOL> static constexpr bool clkHigh () {
return !static_cast<bool>(C);
}
template <spi::cpol C =CPOL> static constexpr bool clkLow () {
return static_cast<bool>(C);
}
static constexpr bool clkH_ {clkHigh()};
static constexpr bool clkL_ {clkLow()};
//!}
@ -228,7 +244,11 @@ namespace utl {
use_if_t <(C == spi::cpha::LOW), byte_t> _tx_data_impl (byte_t out);
template <spi::cpha C =CPHA>
use_if_t <(C == spi::cpha::HIGH), byte_t> _tx_data_impl (byte_t out);
//!@}
//! Data members
//! @{
private:
uint32_t nsec_; //!< half period of SPI bus
//! @}
};
@ -245,14 +265,14 @@ namespace utl {
use_if_t <(C == spi::cpha::LOW), byte_t>
spi_bb_i<virtual_tag, CPOL, CPHA, BitOrder>::_tx_data_impl (byte_t out) {
byte_t in {};
SCLK (clkLow());
SCLK (clkL_);
for (uint8_t bit {static_cast<uint8_t>(BitOrder)} ; bit ; shift (bit)) {
MOSI (out & bit); // Out at preceding clock trailing edge
delay (nsec_); // Half cycle delay
SCLK (clkHigh()); // Leading edge
SCLK (clkH_); // Leading edge
in |= (MISO ()) ? bit : 0; // In at leading clock edge
delay (nsec_); // Half cycle delay
SCLK (clkLow()); // Trailing edge
SCLK (clkL_); // Trailing edge
}
return in;
}
@ -269,13 +289,13 @@ namespace utl {
use_if_t <(C == spi::cpha::HIGH), byte_t>
spi_bb_i<virtual_tag, CPOL, CPHA, BitOrder>::_tx_data_impl (byte_t out) {
byte_t in {};
SCLK (clkLow());
SCLK (clkL_);
for (uint8_t bit {static_cast<uint8_t>(BitOrder)} ; bit ; shift (bit)) {
delay (nsec_); // Half cycle delay
SCLK (clkHigh()); // Leading edge
SCLK (clkH_); // Leading edge
MOSI (out & bit); // Out at leading clock edge
delay (nsec_); // Half cycle delay
SCLK (clkLow()); // Trailing edge
SCLK (clkL_); // Trailing edge
in |= (MISO ()) ? bit : 0; // In at trailing clock edge
}
return in;