diff --git a/include/utl/com/spi.h b/include/utl/com/spi.h index 6b9c2e9..43d87ea 100644 --- a/include/utl/com/spi.h +++ b/include/utl/com/spi.h @@ -78,7 +78,7 @@ namespace utl { spi_i () = default; //!< Allow constructor from derived only ~spi_i () = default; //!< Allow destructor from derived only spi_i (const type&) = delete; //!< No copies - spi_i& operator= (const spi_i&) = delete; + type& operator= (const type&) = delete; //!@} /*! diff --git a/include/utl/com/spi_bb.h b/include/utl/com/spi_bb.h index 2b94793..ceecd2e 100644 --- a/include/utl/com/spi_bb.h +++ b/include/utl/com/spi_bb.h @@ -74,12 +74,18 @@ namespace utl { private: //! \name SPI implementation specific functions //!@{ - template constexpr bool clkHigh () { return !static_cast(C); } - template constexpr bool clkLow () { return static_cast(C); } template constexpr use_if_t <(B == spi::bitOrder::LSB_First), void> shift (byte_t& b) { b <<=1; } template constexpr use_if_t <(B == spi::bitOrder::MSB_First), void> shift (byte_t& b) { b >>=1; } + template static constexpr bool clkHigh () { + return !static_cast(C); + } + template static constexpr bool clkLow () { + return static_cast(C); + } + static constexpr bool clkH_ {clkHigh()}; + static constexpr bool clkL_ {clkLow()}; //!} /*! @@ -110,9 +116,13 @@ namespace utl { use_if_t <(C == spi::cpha::LOW), byte_t> _tx_data_impl (byte_t out); template use_if_t <(C == spi::cpha::HIGH), byte_t> _tx_data_impl (byte_t out); + //!@} + //! Data members + //! @{ + private: uint32_t nsec_; //!< half period of SPI bus - //!@} + //! @} }; /*! @@ -127,14 +137,14 @@ namespace utl { use_if_t <(C == spi::cpha::LOW), byte_t> spi_bb_i::_tx_data_impl (byte_t out) { byte_t in {}; - SCLK (clkLow()); + SCLK (clkL_); for (uint8_t bit {static_cast(BitOrder)} ; bit ; shift (bit)) { MOSI (out & bit); // Out at preceding clock trailing edge delay (nsec_); // Half cycle delay - SCLK (clkHigh()); // Leading edge + SCLK (clkH_); // Leading edge in |= (MISO ()) ? bit : 0; // In at leading clock edge delay (nsec_); // Half cycle delay - SCLK (clkLow()); // Trailing edge + SCLK (clkL_); // Trailing edge } return in; } @@ -151,13 +161,13 @@ namespace utl { use_if_t <(C == spi::cpha::HIGH), byte_t> spi_bb_i::_tx_data_impl (byte_t out) { byte_t in {}; - SCLK (clkLow()); + SCLK (clkL_); for (uint8_t bit {static_cast(BitOrder)} ; bit ; shift (bit)) { delay (nsec_); // Half cycle delay - SCLK (clkHigh()); // Leading edge + SCLK (clkH_); // Leading edge MOSI (out & bit); // Out at leading clock edge delay (nsec_); // Half cycle delay - SCLK (clkLow()); // Trailing edge + SCLK (clkL_); // Trailing edge in |= (MISO ()) ? bit : 0; // In at trailing clock edge } return in; @@ -196,12 +206,18 @@ namespace utl { private: //! \name SPI implementation specific functions //!@{ - template constexpr bool clkHigh () { return !static_cast(C); } - template constexpr bool clkLow () { return static_cast(C); } template constexpr use_if_t <(B == spi::bitOrder::LSB_First), void> shift (byte_t& b) { b <<=1; } template constexpr use_if_t <(B == spi::bitOrder::MSB_First), void> shift (byte_t& b) { b >>=1; } + template static constexpr bool clkHigh () { + return !static_cast(C); + } + template static constexpr bool clkLow () { + return static_cast(C); + } + static constexpr bool clkH_ {clkHigh()}; + static constexpr bool clkL_ {clkLow()}; //!} @@ -228,9 +244,13 @@ namespace utl { use_if_t <(C == spi::cpha::LOW), byte_t> _tx_data_impl (byte_t out); template use_if_t <(C == spi::cpha::HIGH), byte_t> _tx_data_impl (byte_t out); + //!@} + //! Data members + //! @{ + private: uint32_t nsec_; //!< half period of SPI bus - //!@} + //! @} }; /*! @@ -245,14 +265,14 @@ namespace utl { use_if_t <(C == spi::cpha::LOW), byte_t> spi_bb_i::_tx_data_impl (byte_t out) { byte_t in {}; - SCLK (clkLow()); + SCLK (clkL_); for (uint8_t bit {static_cast(BitOrder)} ; bit ; shift (bit)) { MOSI (out & bit); // Out at preceding clock trailing edge delay (nsec_); // Half cycle delay - SCLK (clkHigh()); // Leading edge + SCLK (clkH_); // Leading edge in |= (MISO ()) ? bit : 0; // In at leading clock edge delay (nsec_); // Half cycle delay - SCLK (clkLow()); // Trailing edge + SCLK (clkL_); // Trailing edge } return in; } @@ -269,13 +289,13 @@ namespace utl { use_if_t <(C == spi::cpha::HIGH), byte_t> spi_bb_i::_tx_data_impl (byte_t out) { byte_t in {}; - SCLK (clkLow()); + SCLK (clkL_); for (uint8_t bit {static_cast(BitOrder)} ; bit ; shift (bit)) { delay (nsec_); // Half cycle delay - SCLK (clkHigh()); // Leading edge + SCLK (clkH_); // Leading edge MOSI (out & bit); // Out at leading clock edge delay (nsec_); // Half cycle delay - SCLK (clkLow()); // Trailing edge + SCLK (clkL_); // Trailing edge in |= (MISO ()) ? bit : 0; // In at trailing clock edge } return in;