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A bundled STM32F10x Std Periph and CMSIS library
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STM32F10x_Std_Lib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_i2c.h

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  1. /*

  2.  * stm32f10x_i2c.h

  3.  *

  4.  * Copyright (C) 2013 Houtouridis Christos <houtouridis.ch@gmail.com>

  5.  *

  6.  * All Rights Reserved.

  7.  *

  8.  * NOTICE:  All information contained herein is, and remains

  9.  * the property of Houtouridis Christos. The intellectual

  10.  * and technical concepts contained herein are proprietary to

  11.  * Houtouridis Christos and are protected by copyright law.

  12.  * Dissemination of this information or reproduction of this material

  13.  * is strictly forbidden unless prior written permission is obtained

  14.  * from Houtouridis Christos.

  15.  *

  16.  * Author:     Houtouridis Christos <houtouridis.ch@gmail.com>

  17.  * Date:       4 ��� 2013

  18.  *

  19.  */

  20. 

  21. 

  22. #ifndef __STM32F10x_I2C_H__

  23. #define __STM32F10x_I2C_H__

  24. 

  25. #ifdef __cplusplus

  26. extern "C" {

  27. #endif

  28. 

  29. #include "stm32f10x.h"

  30. #include "stm32f10x_assert.h"

  31. 

  32. /*==============   User Defines    ================*/

  33. #define I2C_USE_IT            (0)

  34. #define I2C_USE_SMBUS         (0)

  35. #define I2C_USE_PEC           (0)

  36. 

  37. // I2C_Exported_Constants

  38. #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \

  39.                                    ((PERIPH) == I2C2))

  40. 

  41. // I2C_mode

  42. #define I2C_Mode_I2C                    ((uint16_t)0x0000)

  43. #define I2C_Mode_SMBusDevice            ((uint16_t)0x0002)

  44. #define I2C_Mode_SMBusHost              ((uint16_t)0x000A)

  45. #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \

  46.                            ((MODE) == I2C_Mode_SMBusDevice) || \

  47.                            ((MODE) == I2C_Mode_SMBusHost))

  48. 

  49. // I2C_duty_cycle_in_fast_mode

  50. #define I2C_DutyCycle_16_9              ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */

  51. #define I2C_DutyCycle_2                 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */

  52. #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \

  53.                                   ((CYCLE) == I2C_DutyCycle_2))

  54. 

  55. // I2C_acknowledgement

  56. #define I2C_Ack_Enable                  ((uint16_t)0x0400)

  57. #define I2C_Ack_Disable                 ((uint16_t)0x0000)

  58. #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \

  59.                                  ((STATE) == I2C_Ack_Disable))

  60. 

  61. // I2C_transfer_direction

  62. #define  I2C_Direction_Transmitter      ((uint8_t)0x00)

  63. #define  I2C_Direction_Receiver         ((uint8_t)0x01)

  64. #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \

  65.                                      ((DIRECTION) == I2C_Direction_Receiver))

  66. 

  67. // I2C_acknowledged_address

  68. #define I2C_AcknowledgedAddress_7bit    ((uint16_t)0x4000)

  69. #define I2C_AcknowledgedAddress_10bit   ((uint16_t)0xC000)

  70. #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \

  71.                                              ((ADDRESS) == I2C_AcknowledgedAddress_10bit))

  72. 

  73. // I2C_registers

  74. #define I2C_Register_CR1                ((uint8_t)0x00)

  75. #define I2C_Register_CR2                ((uint8_t)0x04)

  76. #define I2C_Register_OAR1               ((uint8_t)0x08)

  77. #define I2C_Register_OAR2               ((uint8_t)0x0C)

  78. #define I2C_Register_DR                 ((uint8_t)0x10)

  79. #define I2C_Register_SR1                ((uint8_t)0x14)

  80. #define I2C_Register_SR2                ((uint8_t)0x18)

  81. #define I2C_Register_CCR                ((uint8_t)0x1C)

  82. #define I2C_Register_TRISE              ((uint8_t)0x20)

  83. #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \

  84.                                    ((REGISTER) == I2C_Register_CR2) || \

  85.                                    ((REGISTER) == I2C_Register_OAR1) || \

  86.                                    ((REGISTER) == I2C_Register_OAR2) || \

  87.                                    ((REGISTER) == I2C_Register_DR) || \

  88.                                    ((REGISTER) == I2C_Register_SR1) || \

  89.                                    ((REGISTER) == I2C_Register_SR2) || \

  90.                                    ((REGISTER) == I2C_Register_CCR) || \

  91.                                    ((REGISTER) == I2C_Register_TRISE))

  92. 

  93. // I2C_SMBus_alert_pin_level

  94. #define I2C_SMBusAlert_Low              ((uint16_t)0x2000)

  95. #define I2C_SMBusAlert_High             ((uint16_t)0xDFFF)

  96. #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \

  97.                                    ((ALERT) == I2C_SMBusAlert_High))

  98. 

  99. // I2C_PEC_position

  100. #define I2C_PECPosition_Next            ((uint16_t)0x0800)

  101. #define I2C_PECPosition_Current         ((uint16_t)0xF7FF)

  102. #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \

  103.                                        ((POSITION) == I2C_PECPosition_Current))

  104. 

  105. // I2C_NCAK_position

  106. #define I2C_NACKPosition_Next           ((uint16_t)0x0800)

  107. #define I2C_NACKPosition_Current        ((uint16_t)0xF7FF)

  108. #define IS_I2C_NACK_POSITION(POSITION)  (((POSITION) == I2C_NACKPosition_Next) || \

  109.                                          ((POSITION) == I2C_NACKPosition_Current))

  110. 

  111. // I2C_interrupts_definition

  112. #define I2C_IT_BUF                      ((uint16_t)0x0400)

  113. #define I2C_IT_EVT                      ((uint16_t)0x0200)

  114. #define I2C_IT_ERR                      ((uint16_t)0x0100)

  115. #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))

  116. 

  117. 

  118. // I2C_interrupts_definition

  119. #define I2C_IT_SMBALERT                 ((uint32_t)0x01008000)

  120. #define I2C_IT_TIMEOUT                  ((uint32_t)0x01004000)

  121. #define I2C_IT_PECERR                   ((uint32_t)0x01001000)

  122. #define I2C_IT_OVR                      ((uint32_t)0x01000800)

  123. #define I2C_IT_AF                       ((uint32_t)0x01000400)

  124. #define I2C_IT_ARLO                     ((uint32_t)0x01000200)

  125. #define I2C_IT_BERR                     ((uint32_t)0x01000100)

  126. #define I2C_IT_TXE                      ((uint32_t)0x06000080)

  127. #define I2C_IT_RXNE                     ((uint32_t)0x06000040)

  128. #define I2C_IT_STOPF                    ((uint32_t)0x02000010)

  129. #define I2C_IT_ADD10                    ((uint32_t)0x02000008)

  130. #define I2C_IT_BTF                      ((uint32_t)0x02000004)

  131. #define I2C_IT_ADDR                     ((uint32_t)0x02000002)

  132. #define I2C_IT_SB                       ((uint32_t)0x02000001)

  133. 

  134. #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))

  135. 

  136. #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \

  137.                            ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \

  138.                            ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \

  139.                            ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \

  140.                            ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \

  141.                            ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \

  142.                            ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))

  143. 

  144. // I2C_flags_definition

  145. #define I2C_FLAG_DUALF                  ((uint32_t)0x00800000)

  146. #define I2C_FLAG_SMBHOST                ((uint32_t)0x00400000)

  147. #define I2C_FLAG_SMBDEFAULT             ((uint32_t)0x00200000)

  148. #define I2C_FLAG_GENCALL                ((uint32_t)0x00100000)

  149. #define I2C_FLAG_TRA                    ((uint32_t)0x00040000)

  150. #define I2C_FLAG_BUSY                   ((uint32_t)0x00020000)

  151. #define I2C_FLAG_MSL                    ((uint32_t)0x00010000)

  152. 

  153. 

  154. #define I2C_FLAG_SMBALERT               ((uint32_t)0x10008000)

  155. #define I2C_FLAG_TIMEOUT                ((uint32_t)0x10004000)

  156. #define I2C_FLAG_PECERR                 ((uint32_t)0x10001000)

  157. #define I2C_FLAG_OVR                    ((uint32_t)0x10000800)

  158. #define I2C_FLAG_AF                     ((uint32_t)0x10000400)

  159. #define I2C_FLAG_ARLO                   ((uint32_t)0x10000200)

  160. #define I2C_FLAG_BERR                   ((uint32_t)0x10000100)

  161. #define I2C_FLAG_TXE                    ((uint32_t)0x10000080)

  162. #define I2C_FLAG_RXNE                   ((uint32_t)0x10000040)

  163. #define I2C_FLAG_STOPF                  ((uint32_t)0x10000010)

  164. #define I2C_FLAG_ADD10                  ((uint32_t)0x10000008)

  165. #define I2C_FLAG_BTF                    ((uint32_t)0x10000004)

  166. #define I2C_FLAG_ADDR                   ((uint32_t)0x10000002)

  167. #define I2C_FLAG_SB                     ((uint32_t)0x10000001)

  168. 

  169. #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))

  170. 

  171. #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \

  172.                                ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \

  173.                                ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \

  174.                                ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \

  175.                                ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \

  176.                                ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \

  177.                                ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \

  178.                                ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \

  179.                                ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \

  180.                                ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \

  181.                                ((FLAG) == I2C_FLAG_SB))

  182. 

  183. 

  184. /*

  185.  * ====================================================================

  186.  *  I2C Master Events (Events grouped in order of communication)

  187.  * ====================================================================

  188.  */

  189. 

  190. /*!

  191.  * \brief  Communication start

  192.  *

  193.  * After sending the START condition (I2C_GenerateSTART() function) the master

  194.  * has to wait for this event. It means that the Start condition has been correctly

  195.  * released on the I2C bus (the bus is free, no other devices is communicating).

  196.  *

  197.  */

  198. /* --EV5 */

  199. #define  I2C_EVENT_MASTER_MODE_SELECT        ((uint32_t)0x00030001)  /* BUSY, MSL and SB flag */

  200. 

  201. /*!

  202.   * \brief  Address Acknowledge

  203.   *

  204.   * After checking on EV5 (start condition correctly released on the bus), the

  205.   * master sends the address of the slave(s) with which it will communicate

  206.   * (I2C_Send7bitAddress() function, it also determines the direction of the communication:

  207.   * Master transmitter or Receiver). Then the master has to wait that a slave acknowledges

  208.   * his address. If an acknowledge is sent on the bus, one of the following events will

  209.   * be set:

  210.   *

  211.   *  1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED

  212.   *     event is set.

  213.   *

  214.   *  2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED

  215.   *     is set

  216.   *

  217.   *  3) In case of 10-Bit addressing mode, the master (just after generating the START

  218.   *  and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData()

  219.   *  function). Then master should wait on EV9. It means that the 10-bit addressing

  220.   *  header has been correctly sent on the bus. Then master should send the second part of

  221.   *  the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master

  222.   *  should wait for event EV6.

  223.   *

  224.   */

  225. 

  226. /* --EV6 */

  227. #define  I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED        ((uint32_t)0x00070082)  /* BUSY, MSL, ADDR, TXE and TRA flags */

  228. #define  I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED           ((uint32_t)0x00030002)  /* BUSY, MSL and ADDR flags */

  229. /* --EV9 */

  230. #define  I2C_EVENT_MASTER_MODE_ADDRESS10                   ((uint32_t)0x00030008)  /* BUSY, MSL and ADD10 flags */

  231. 

  232. /*!

  233.  * \brief Communication events

  234.  *

  235.  * If a communication is established (START condition generated and slave address

  236.  * acknowledged) then the master has to check on one of the following events for

  237.  * communication procedures:

  238.  *

  239.  * 1) Master Receiver mode: The master has to wait on the event EV7 then to read

  240.  *    the data received from the slave (I2C_ReceiveData() function).

  241.  *

  242.  * 2) Master Transmitter mode: The master has to send data (I2C_SendData()

  243.  *    function) then to wait on event EV8 or EV8_2.

  244.  *    These two events are similar:

  245.  *     - EV8 means that the data has been written in the data register and is

  246.  *       being shifted out.

  247.  *     - EV8_2 means that the data has been physically shifted out and output

  248.  *       on the bus.

  249.  *     In most cases, using EV8 is sufficient for the application.

  250.  *     Using EV8_2 leads to a slower communication but ensure more reliable test.

  251.  *     EV8_2 is also more suitable than EV8 for testing on the last data transmission

  252.  *     (before Stop condition generation).

  253.  *

  254.  *  \note In case the  user software does not guarantee that this event EV7 is

  255.  *  managed before the current byte end of transfer, then user may check on EV7

  256.  *  and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)).

  257.  *  In this case the communication may be slower.

  258.  *

  259.  */

  260. 

  261. /* Master RECEIVER mode -----------------------------*/

  262. /* --EV7 */

  263. #define  I2C_EVENT_MASTER_BYTE_RECEIVED                    ((uint32_t)0x00030040)  /* BUSY, MSL and RXNE flags */

  264. 

  265. /* --EV7_2 */

  266. #define   I2C_EVENT_MASTER_BYTE_TRANFERED                  ((uint32_t)0x00030044)

  267. 

  268. 

  269. /* Master TRANSMITTER mode --------------------------*/

  270. /* --EV8 */

  271. #define I2C_EVENT_MASTER_BYTE_TRANSMITTING                 ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */

  272. /* --EV8_2 */

  273. #define  I2C_EVENT_MASTER_BYTE_TRANSMITTED                 ((uint32_t)0x00070084)  /* TRA, BUSY, MSL, TXE and BTF flags */

  274. 

  275. 

  276. /*

  277.  * =======================================================================

  278.  *        I2C Slave Events (Events grouped in order of communication)

  279.  * =======================================================================

  280.  */

  281. 

  282. /*!

  283.  * \brief  Communication start events

  284.  *

  285.  * Wait on one of these events at the start of the communication. It means that

  286.  * the I2C peripheral detected a Start condition on the bus (generated by master

  287.  * device) followed by the peripheral address. The peripheral generates an ACK

  288.  * condition on the bus (if the acknowledge feature is enabled through function

  289.  * I2C_AcknowledgeConfig()) and the events listed above are set :

  290.  *

  291.  * 1) In normal case (only one address managed by the slave), when the address

  292.  *   sent by the master matches the own address of the peripheral (configured by

  293.  *   I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set

  294.  *   (where XXX could be TRANSMITTER or RECEIVER).

  295.  *

  296.  * 2) In case the address sent by the master matches the second address of the

  297.  *   peripheral (configured by the function I2C_OwnAddress2Config() and enabled

  298.  *   by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED

  299.  *   (where XXX could be TRANSMITTER or RECEIVER) are set.

  300.  *

  301.  * 3) In case the address sent by the master is General Call (address 0x00) and

  302.  *   if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd())

  303.  *   the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED.

  304.  *

  305.  */

  306. 

  307. /* --EV1  (all the events below are variants of EV1) */

  308. /* 1) Case of One Single Address managed by the slave */

  309. #define  I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED          ((uint32_t)0x00020002) /* BUSY and ADDR flags */

  310. #define  I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED       ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */

  311. 

  312. /* 2) Case of Dual address managed by the slave */

  313. #define  I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED    ((uint32_t)0x00820000)  /* DUALF and BUSY flags */

  314. #define  I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080)  /* DUALF, TRA, BUSY and TXE flags */

  315. 

  316. /* 3) Case of General Call enabled for the slave */

  317. #define  I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED        ((uint32_t)0x00120000)  /* GENCALL and BUSY flags */

  318. 

  319. /*!

  320.  * \brief  Communication events

  321.  *

  322.  * Wait on one of these events when EV1 has already been checked and:

  323.  *

  324.  * - Slave RECEIVER mode:

  325.  *     - EV2: When the application is expecting a data byte to be received.

  326.  *     - EV4: When the application is expecting the end of the communication: master

  327.  *       sends a stop condition and data transmission is stopped.

  328.  *

  329.  * - Slave Transmitter mode:

  330.  *    - EV3: When a byte has been transmitted by the slave and the application is expecting

  331.  *      the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and

  332.  *      I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be

  333.  *      used when the user software doesn't guarantee the EV3 is managed before the

  334.  *      current byte end of transfer.

  335.  *    - EV3_2: When the master sends a NACK in order to tell slave that data transmission

  336.  *      shall end (before sending the STOP condition). In this case slave has to stop sending

  337.  *      data bytes and expect a Stop condition on the bus.

  338.  *

  339.  *  \note In case the  user software does not guarantee that the event EV2 is

  340.  *  managed before the current byte end of transfer, then user may check on EV2

  341.  *  and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)).

  342.  * In this case the communication may be slower.

  343.  *

  344.  */

  345. 

  346. /* Slave RECEIVER mode --------------------------*/

  347. /* --EV2 */

  348. #define  I2C_EVENT_SLAVE_BYTE_RECEIVED                     ((uint32_t)0x00020040)  /* BUSY and RXNE flags */

  349. /* --EV4  */

  350. #define  I2C_EVENT_SLAVE_STOP_DETECTED                     ((uint32_t)0x00000010)  /* STOPF flag */

  351. 

  352. /* Slave TRANSMITTER mode -----------------------*/

  353. /* --EV3 */

  354. #define  I2C_EVENT_SLAVE_BYTE_TRANSMITTED                  ((uint32_t)0x00060084)  /* TRA, BUSY, TXE and BTF flags */

  355. #define  I2C_EVENT_SLAVE_BYTE_TRANSMITTING                 ((uint32_t)0x00060080)  /* TRA, BUSY and TXE flags */

  356. /* --EV3_2 */

  357. #define  I2C_EVENT_SLAVE_ACK_FAILURE                       ((uint32_t)0x00000400)  /* AF flag */

  358. 

  359. /*===========================      End of Events Description           ==========================================*/

  360. 

  361. #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \

  362.                              ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \

  363.                              ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \

  364.                              ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \

  365.                              ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \

  366.                              ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \

  367.                              ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \

  368.                              ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \

  369.                              ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \

  370.                              ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \

  371.                              ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \

  372.                              ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \

  373.                              ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \

  374.                              ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \

  375.                              ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \

  376.                              ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \

  377.                              ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \

  378.                              ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \

  379.                              ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \

  380.                              ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))

  381. 

  382. 

  383. #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)

  384. 

  385. #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))

  386. 

  387. 

  388. 

  389. 

  390. /*=====================   Data Types    =========================*/

  391. typedef struct

  392. {

  393.    uint32_t I2C_ClockSpeed;          /*!< Specifies the clock frequency.

  394.                                           This parameter must be set to a value lower than 400kHz */

  395.    uint16_t I2C_Mode;                /*!< Specifies the I2C mode.

  396.                                           This parameter can be a value of @ref I2C_mode */

  397.    uint16_t I2C_DutyCycle;           /*!< Specifies the I2C fast mode duty cycle.

  398.                                           This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */

  399.    uint16_t I2C_OwnAddress;          /*!< Specifies the first device own address.

  400.                                           This parameter can be a 7-bit or 10-bit address. */

  401.    uint16_t I2C_Ack;                 /*!< Enables or disables the acknowledgement.

  402.                                           This parameter can be a value of @ref I2C_acknowledgement */

  403.    uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.

  404.                                           This parameter can be a value of @ref I2C_acknowledged_address */

  405. }I2C_InitTypeDef;

  406. 

  407. 

  408. 

  409. /*======================   Exported Functions    ===========================*/

  410. void I2C_DeInit(I2C_TypeDef* I2Cx);

  411. void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);

  412. void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);

  413. void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);

  414. void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);

  415. void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);

  416. void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);

  417. void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);

  418. void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);

  419. void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);

  420. void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);

  421. void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);

  422. #if I2C_USE_IT == 1

  423. void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);

  424. #endif

  425. void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);

  426. uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);

  427. void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);

  428. uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);

  429. void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);

  430. void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition);

  431. #if I2C_USE_SMBUS == 1

  432. void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);

  433. #endif

  434. #if I2C_USE_PEC == 1

  435. void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);

  436. void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);

  437. void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);

  438. uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);

  439. #endif //#if I2C_USE_PEC == 1

  440. #if I2C_USE_SMBUS == 1

  441. void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);

  442. #endif

  443. void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);

  444. void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);

  445. 

  446. 

  447. 

  448. /*!

  449.  * \brief

  450.  ****************************************************************************************

  451.  *

  452.  *                         I2C State Monitoring Functions

  453.  *

  454.  ****************************************************************************************

  455.  * This I2C driver provides three different ways for I2C state monitoring

  456.  *  depending on the application requirements and constraints:

  457.  *

  458.  *

  459.  * 1) Basic state monitoring:

  460.  *    Using I2C_CheckEvent() function:

  461.  *    It compares the status registers (SR1 and SR2) content to a given event

  462.  *    (can be the combination of one or more flags).

  463.  *    It returns SUCCESS if the current status includes the given flags

  464.  *    and returns ERROR if one or more flags are missing in the current status.

  465.  *    - When to use:

  466.  *      - This function is suitable for most applications as well as for startup

  467.  *      activity since the events are fully described in the product reference manual

  468.  *      (RM0008).

  469.  *      - It is also suitable for users who need to define their own events.

  470.  *    - Limitations:

  471.  *      - If an error occurs (ie. error flags are set besides to the monitored flags),

  472.  *        the I2C_CheckEvent() function may return SUCCESS despite the communication

  473.  *        hold or corrupted real state.

  474.  *        In this case, it is advised to use error interrupts to monitor the error

  475.  *        events and handle them in the interrupt IRQ handler.

  476.  *

  477.  *        @note

  478.  *        For error management, it is advised to use the following functions:

  479.  *          - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).

  480.  *          - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs.

  481.  *            Where x is the peripheral instance (I2C1, I2C2 ...)

  482.  *          - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler()

  483.  *            in order to determine which error occurred.

  484.  *          - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()

  485.  *            and/or I2C_GenerateStop() in order to clear the error flag and source,

  486.  *            and return to correct communication status.

  487.  *

  488.  *

  489.  *  2) Advanced state monitoring:

  490.  *     Using the function I2C_GetLastEvent() which returns the image of both status

  491.  *     registers in a single word (uint32_t) (Status Register 2 value is shifted left

  492.  *     by 16 bits and concatenated to Status Register 1).

  493.  *     - When to use:

  494.  *       - This function is suitable for the same applications above but it allows to

  495.  *         overcome the limitations of I2C_GetFlagStatus() function (see below).

  496.  *         The returned value could be compared to events already defined in the

  497.  *         library (stm32f10x_i2c.h) or to custom values defined by user.

  498.  *       - This function is suitable when multiple flags are monitored at the same time.

  499.  *       - At the opposite of I2C_CheckEvent() function, this function allows user to

  500.  *         choose when an event is accepted (when all events flags are set and no

  501.  *         other flags are set or just when the needed flags are set like

  502.  *         I2C_CheckEvent() function).

  503.  *     - Limitations:

  504.  *       - User may need to define his own events.

  505.  *       - Same remark concerning the error management is applicable for this

  506.  *         function if user decides to check only regular communication flags (and

  507.  *         ignores error flags).

  508.  *

  509.  *

  510.  *  3) Flag-based state monitoring:

  511.  *     Using the function I2C_GetFlagStatus() which simply returns the status of

  512.  *     one single flag (ie. I2C_FLAG_RXNE ...).

  513.  *     - When to use:

  514.  *        - This function could be used for specific applications or in debug phase.

  515.  *        - It is suitable when only one flag checking is needed (most I2C events

  516.  *          are monitored through multiple flags).

  517.  *     - Limitations:

  518.  *        - When calling this function, the Status register is accessed. Some flags are

  519.  *          cleared when the status register is accessed. So checking the status

  520.  *          of one Flag, may clear other ones.

  521.  *        - Function may need to be called twice or more in order to monitor one

  522.  *          single event.

  523.  *

  524.  */

  525. 

  526. /*

  527.  *  1) Basic state monitoring

  528.  */

  529. ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);

  530. /*

  531.  *  2) Advanced state monitoring

  532.  */

  533. uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);

  534. /*

  535.  *  3) Flag-based state monitoring

  536.  */

  537. FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);

  538. 

  539. 

  540. void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);

  541. #if I2C_USE_IT == 1

  542. ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);

  543. void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);

  544. #endif

  545. #ifdef __cplusplus

  546. }

  547. #endif

  548. 

  549. #endif /*__STM32F10x_I2C_H__ */

  550. 

  551. 

  552. /*****END OF FILE****/