A bundled STM32F10x Std Periph and CMSIS library
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  1. /**
  2. ******************************************************************************
  3. * @file stm32f10x_adc.h
  4. * @author MCD Application Team
  5. * @version V3.5.0
  6. * @date 11-March-2011
  7. * @brief This file contains all the functions prototypes for the ADC firmware
  8. * library.
  9. ******************************************************************************
  10. * @attention
  11. *
  12. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  13. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  14. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  15. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  16. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  17. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  18. *
  19. * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  20. ******************************************************************************
  21. */
  22. /* Define to prevent recursive inclusion -------------------------------------*/
  23. #ifndef __STM32F10x_ADC_H
  24. #define __STM32F10x_ADC_H
  25. #ifdef __cplusplus
  26. extern "C" {
  27. #endif
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32f10x.h"
  30. #include "stm32f10x_assert.h"
  31. /** @addtogroup STM32F10x_StdPeriph_Driver
  32. * @{
  33. */
  34. /** @addtogroup ADC
  35. * @{
  36. */
  37. /** @defgroup ADC_Exported_Types
  38. * @{
  39. */
  40. /**
  41. * @brief ADC Init structure definition
  42. */
  43. typedef struct
  44. {
  45. uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or
  46. dual mode.
  47. This parameter can be a value of @ref ADC_mode */
  48. FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in
  49. Scan (multichannels) or Single (one channel) mode.
  50. This parameter can be set to ENABLE or DISABLE */
  51. FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
  52. Continuous or Single mode.
  53. This parameter can be set to ENABLE or DISABLE. */
  54. uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog
  55. to digital conversion of regular channels. This parameter
  56. can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
  57. uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
  58. This parameter can be a value of @ref ADC_data_align */
  59. uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted
  60. using the sequencer for regular channel group.
  61. This parameter must range from 1 to 16. */
  62. }ADC_InitTypeDef;
  63. /**
  64. * @}
  65. */
  66. /** @defgroup ADC_Exported_Constants
  67. * @{
  68. */
  69. #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
  70. ((PERIPH) == ADC2) || \
  71. ((PERIPH) == ADC3))
  72. #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
  73. ((PERIPH) == ADC3))
  74. /** @defgroup ADC_mode
  75. * @{
  76. */
  77. #define ADC_Mode_Independent ((uint32_t)0x00000000)
  78. #define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000)
  79. #define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000)
  80. #define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000)
  81. #define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000)
  82. #define ADC_Mode_InjecSimult ((uint32_t)0x00050000)
  83. #define ADC_Mode_RegSimult ((uint32_t)0x00060000)
  84. #define ADC_Mode_FastInterl ((uint32_t)0x00070000)
  85. #define ADC_Mode_SlowInterl ((uint32_t)0x00080000)
  86. #define ADC_Mode_AlterTrig ((uint32_t)0x00090000)
  87. #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
  88. ((MODE) == ADC_Mode_RegInjecSimult) || \
  89. ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \
  90. ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \
  91. ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \
  92. ((MODE) == ADC_Mode_InjecSimult) || \
  93. ((MODE) == ADC_Mode_RegSimult) || \
  94. ((MODE) == ADC_Mode_FastInterl) || \
  95. ((MODE) == ADC_Mode_SlowInterl) || \
  96. ((MODE) == ADC_Mode_AlterTrig))
  97. /**
  98. * @}
  99. */
  100. /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion
  101. * @{
  102. */
  103. #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */
  104. #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */
  105. #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */
  106. #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */
  107. #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */
  108. #define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */
  109. #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */
  110. #define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */
  111. #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */
  112. #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */
  113. #define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */
  114. #define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */
  115. #define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */
  116. #define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */
  117. #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
  118. ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
  119. ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
  120. ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
  121. ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
  122. ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
  123. ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \
  124. ((REGTRIG) == ADC_ExternalTrigConv_None) || \
  125. ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
  126. ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
  127. ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
  128. ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
  129. ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
  130. ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3))
  131. /**
  132. * @}
  133. */
  134. /** @defgroup ADC_data_align
  135. * @{
  136. */
  137. #define ADC_DataAlign_Right ((uint32_t)0x00000000)
  138. #define ADC_DataAlign_Left ((uint32_t)0x00000800)
  139. #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
  140. ((ALIGN) == ADC_DataAlign_Left))
  141. /**
  142. * @}
  143. */
  144. /** @defgroup ADC_channels
  145. * @{
  146. */
  147. #define ADC_Channel_0 ((uint8_t)0x00)
  148. #define ADC_Channel_1 ((uint8_t)0x01)
  149. #define ADC_Channel_2 ((uint8_t)0x02)
  150. #define ADC_Channel_3 ((uint8_t)0x03)
  151. #define ADC_Channel_4 ((uint8_t)0x04)
  152. #define ADC_Channel_5 ((uint8_t)0x05)
  153. #define ADC_Channel_6 ((uint8_t)0x06)
  154. #define ADC_Channel_7 ((uint8_t)0x07)
  155. #define ADC_Channel_8 ((uint8_t)0x08)
  156. #define ADC_Channel_9 ((uint8_t)0x09)
  157. #define ADC_Channel_10 ((uint8_t)0x0A)
  158. #define ADC_Channel_11 ((uint8_t)0x0B)
  159. #define ADC_Channel_12 ((uint8_t)0x0C)
  160. #define ADC_Channel_13 ((uint8_t)0x0D)
  161. #define ADC_Channel_14 ((uint8_t)0x0E)
  162. #define ADC_Channel_15 ((uint8_t)0x0F)
  163. #define ADC_Channel_16 ((uint8_t)0x10)
  164. #define ADC_Channel_17 ((uint8_t)0x11)
  165. #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
  166. #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
  167. #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
  168. ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
  169. ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
  170. ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
  171. ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
  172. ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
  173. ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \
  174. ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \
  175. ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17))
  176. /**
  177. * @}
  178. */
  179. /** @defgroup ADC_sampling_time
  180. * @{
  181. */
  182. #define ADC_SampleTime_1Cycles5 ((uint8_t)0x00)
  183. #define ADC_SampleTime_7Cycles5 ((uint8_t)0x01)
  184. #define ADC_SampleTime_13Cycles5 ((uint8_t)0x02)
  185. #define ADC_SampleTime_28Cycles5 ((uint8_t)0x03)
  186. #define ADC_SampleTime_41Cycles5 ((uint8_t)0x04)
  187. #define ADC_SampleTime_55Cycles5 ((uint8_t)0x05)
  188. #define ADC_SampleTime_71Cycles5 ((uint8_t)0x06)
  189. #define ADC_SampleTime_239Cycles5 ((uint8_t)0x07)
  190. #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
  191. ((TIME) == ADC_SampleTime_7Cycles5) || \
  192. ((TIME) == ADC_SampleTime_13Cycles5) || \
  193. ((TIME) == ADC_SampleTime_28Cycles5) || \
  194. ((TIME) == ADC_SampleTime_41Cycles5) || \
  195. ((TIME) == ADC_SampleTime_55Cycles5) || \
  196. ((TIME) == ADC_SampleTime_71Cycles5) || \
  197. ((TIME) == ADC_SampleTime_239Cycles5))
  198. /**
  199. * @}
  200. */
  201. /** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion
  202. * @{
  203. */
  204. #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */
  205. #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */
  206. #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */
  207. #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */
  208. #define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */
  209. #define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */
  210. #define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */
  211. #define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */
  212. #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */
  213. #define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */
  214. #define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */
  215. #define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */
  216. #define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */
  217. #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
  218. ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
  219. ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
  220. ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
  221. ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
  222. ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
  223. ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \
  224. ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \
  225. ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
  226. ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
  227. ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
  228. ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
  229. ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4))
  230. /**
  231. * @}
  232. */
  233. /** @defgroup ADC_injected_channel_selection
  234. * @{
  235. */
  236. #define ADC_InjectedChannel_1 ((uint8_t)0x14)
  237. #define ADC_InjectedChannel_2 ((uint8_t)0x18)
  238. #define ADC_InjectedChannel_3 ((uint8_t)0x1C)
  239. #define ADC_InjectedChannel_4 ((uint8_t)0x20)
  240. #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
  241. ((CHANNEL) == ADC_InjectedChannel_2) || \
  242. ((CHANNEL) == ADC_InjectedChannel_3) || \
  243. ((CHANNEL) == ADC_InjectedChannel_4))
  244. /**
  245. * @}
  246. */
  247. /** @defgroup ADC_analog_watchdog_selection
  248. * @{
  249. */
  250. #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
  251. #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
  252. #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
  253. #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
  254. #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
  255. #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
  256. #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
  257. #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
  258. ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
  259. ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
  260. ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
  261. ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
  262. ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
  263. ((WATCHDOG) == ADC_AnalogWatchdog_None))
  264. /**
  265. * @}
  266. */
  267. /** @defgroup ADC_interrupts_definition
  268. * @{
  269. */
  270. #define ADC_IT_EOC ((uint16_t)0x0220)
  271. #define ADC_IT_AWD ((uint16_t)0x0140)
  272. #define ADC_IT_JEOC ((uint16_t)0x0480)
  273. #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00))
  274. #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
  275. ((IT) == ADC_IT_JEOC))
  276. /**
  277. * @}
  278. */
  279. /** @defgroup ADC_flags_definition
  280. * @{
  281. */
  282. #define ADC_FLAG_AWD ((uint8_t)0x01)
  283. #define ADC_FLAG_EOC ((uint8_t)0x02)
  284. #define ADC_FLAG_JEOC ((uint8_t)0x04)
  285. #define ADC_FLAG_JSTRT ((uint8_t)0x08)
  286. #define ADC_FLAG_STRT ((uint8_t)0x10)
  287. #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00))
  288. #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \
  289. ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \
  290. ((FLAG) == ADC_FLAG_STRT))
  291. /**
  292. * @}
  293. */
  294. /** @defgroup ADC_thresholds
  295. * @{
  296. */
  297. #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
  298. /**
  299. * @}
  300. */
  301. /** @defgroup ADC_injected_offset
  302. * @{
  303. */
  304. #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
  305. /**
  306. * @}
  307. */
  308. /** @defgroup ADC_injected_length
  309. * @{
  310. */
  311. #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
  312. /**
  313. * @}
  314. */
  315. /** @defgroup ADC_injected_rank
  316. * @{
  317. */
  318. #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
  319. /**
  320. * @}
  321. */
  322. /** @defgroup ADC_regular_length
  323. * @{
  324. */
  325. #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
  326. /**
  327. * @}
  328. */
  329. /** @defgroup ADC_regular_rank
  330. * @{
  331. */
  332. #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
  333. /**
  334. * @}
  335. */
  336. /** @defgroup ADC_regular_discontinuous_mode_number
  337. * @{
  338. */
  339. #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
  340. /**
  341. * @}
  342. */
  343. /**
  344. * @}
  345. */
  346. /** @defgroup ADC_Exported_Macros
  347. * @{
  348. */
  349. /**
  350. * @}
  351. */
  352. /** @defgroup ADC_Exported_Functions
  353. * @{
  354. */
  355. void ADC_DeInit(ADC_TypeDef* ADCx);
  356. void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
  357. void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
  358. void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  359. void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  360. void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
  361. void ADC_ResetCalibration(ADC_TypeDef* ADCx);
  362. FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx);
  363. void ADC_StartCalibration(ADC_TypeDef* ADCx);
  364. FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
  365. void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  366. FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
  367. void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
  368. void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  369. void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
  370. void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  371. uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
  372. uint32_t ADC_GetDualModeConversionValue(void);
  373. void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  374. void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  375. void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
  376. void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  377. void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  378. FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
  379. void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
  380. void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
  381. void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
  382. uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
  383. void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
  384. void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
  385. void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
  386. void ADC_TempSensorVrefintCmd(FunctionalState NewState);
  387. FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
  388. void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
  389. ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
  390. void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
  391. #ifdef __cplusplus
  392. }
  393. #endif
  394. #endif /*__STM32F10x_ADC_H */
  395. /**
  396. * @}
  397. */
  398. /**
  399. * @}
  400. */
  401. /**
  402. * @}
  403. */
  404. /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/