A bundled STM32F10x Std Periph and CMSIS library
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  1. /**************************************************************************//**
  2. * @file core_cm0.c
  3. * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Source File
  4. * @version V1.30
  5. * @date 30. October 2009
  6. *
  7. * @note
  8. * Copyright (C) 2009 ARM Limited. All rights reserved.
  9. *
  10. * @par
  11. * ARM Limited (ARM) is supplying this software for use with Cortex-M
  12. * processor based microcontrollers. This file can be freely distributed
  13. * within development tools that are supporting such ARM based processors.
  14. *
  15. * @par
  16. * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  17. * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  18. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  19. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  20. * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  21. *
  22. ******************************************************************************/
  23. #include <stdint.h>
  24. /* define compiler specific symbols */
  25. #if defined ( __CC_ARM )
  26. #define __ASM __asm /*!< asm keyword for ARM Compiler */
  27. #define __INLINE __inline /*!< inline keyword for ARM Compiler */
  28. #elif defined ( __ICCARM__ )
  29. #define __ASM __asm /*!< asm keyword for IAR Compiler */
  30. #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
  31. #elif defined ( __GNUC__ )
  32. #define __ASM __asm /*!< asm keyword for GNU Compiler */
  33. #define __INLINE inline /*!< inline keyword for GNU Compiler */
  34. #elif defined ( __TASKING__ )
  35. #define __ASM __asm /*!< asm keyword for TASKING Compiler */
  36. #define __INLINE inline /*!< inline keyword for TASKING Compiler */
  37. #endif
  38. /* ################### Compiler specific Intrinsics ########################### */
  39. #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
  40. /* ARM armcc specific functions */
  41. /**
  42. * @brief Return the Process Stack Pointer
  43. *
  44. * @return ProcessStackPointer
  45. *
  46. * Return the actual process stack pointer
  47. */
  48. __ASM uint32_t __get_PSP(void)
  49. {
  50. mrs r0, psp
  51. bx lr
  52. }
  53. /**
  54. * @brief Set the Process Stack Pointer
  55. *
  56. * @param topOfProcStack Process Stack Pointer
  57. *
  58. * Assign the value ProcessStackPointer to the MSP
  59. * (process stack pointer) Cortex processor register
  60. */
  61. __ASM void __set_PSP(uint32_t topOfProcStack)
  62. {
  63. msr psp, r0
  64. bx lr
  65. }
  66. /**
  67. * @brief Return the Main Stack Pointer
  68. *
  69. * @return Main Stack Pointer
  70. *
  71. * Return the current value of the MSP (main stack pointer)
  72. * Cortex processor register
  73. */
  74. __ASM uint32_t __get_MSP(void)
  75. {
  76. mrs r0, msp
  77. bx lr
  78. }
  79. /**
  80. * @brief Set the Main Stack Pointer
  81. *
  82. * @param topOfMainStack Main Stack Pointer
  83. *
  84. * Assign the value mainStackPointer to the MSP
  85. * (main stack pointer) Cortex processor register
  86. */
  87. __ASM void __set_MSP(uint32_t mainStackPointer)
  88. {
  89. msr msp, r0
  90. bx lr
  91. }
  92. /**
  93. * @brief Reverse byte order in unsigned short value
  94. *
  95. * @param value value to reverse
  96. * @return reversed value
  97. *
  98. * Reverse byte order in unsigned short value
  99. */
  100. __ASM uint32_t __REV16(uint16_t value)
  101. {
  102. rev16 r0, r0
  103. bx lr
  104. }
  105. /**
  106. * @brief Reverse byte order in signed short value with sign extension to integer
  107. *
  108. * @param value value to reverse
  109. * @return reversed value
  110. *
  111. * Reverse byte order in signed short value with sign extension to integer
  112. */
  113. __ASM int32_t __REVSH(int16_t value)
  114. {
  115. revsh r0, r0
  116. bx lr
  117. }
  118. #if (__ARMCC_VERSION < 400000)
  119. /**
  120. * @brief Return the Priority Mask value
  121. *
  122. * @return PriMask
  123. *
  124. * Return state of the priority mask bit from the priority mask register
  125. */
  126. __ASM uint32_t __get_PRIMASK(void)
  127. {
  128. mrs r0, primask
  129. bx lr
  130. }
  131. /**
  132. * @brief Set the Priority Mask value
  133. *
  134. * @param priMask PriMask
  135. *
  136. * Set the priority mask bit in the priority mask register
  137. */
  138. __ASM void __set_PRIMASK(uint32_t priMask)
  139. {
  140. msr primask, r0
  141. bx lr
  142. }
  143. /**
  144. * @brief Return the Control Register value
  145. *
  146. * @return Control value
  147. *
  148. * Return the content of the control register
  149. */
  150. __ASM uint32_t __get_CONTROL(void)
  151. {
  152. mrs r0, control
  153. bx lr
  154. }
  155. /**
  156. * @brief Set the Control Register value
  157. *
  158. * @param control Control value
  159. *
  160. * Set the control register
  161. */
  162. __ASM void __set_CONTROL(uint32_t control)
  163. {
  164. msr control, r0
  165. bx lr
  166. }
  167. #endif /* __ARMCC_VERSION */
  168. #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
  169. /* IAR iccarm specific functions */
  170. #pragma diag_suppress=Pe940
  171. /**
  172. * @brief Return the Process Stack Pointer
  173. *
  174. * @return ProcessStackPointer
  175. *
  176. * Return the actual process stack pointer
  177. */
  178. uint32_t __get_PSP(void)
  179. {
  180. __ASM("mrs r0, psp");
  181. __ASM("bx lr");
  182. }
  183. /**
  184. * @brief Set the Process Stack Pointer
  185. *
  186. * @param topOfProcStack Process Stack Pointer
  187. *
  188. * Assign the value ProcessStackPointer to the MSP
  189. * (process stack pointer) Cortex processor register
  190. */
  191. void __set_PSP(uint32_t topOfProcStack)
  192. {
  193. __ASM("msr psp, r0");
  194. __ASM("bx lr");
  195. }
  196. /**
  197. * @brief Return the Main Stack Pointer
  198. *
  199. * @return Main Stack Pointer
  200. *
  201. * Return the current value of the MSP (main stack pointer)
  202. * Cortex processor register
  203. */
  204. uint32_t __get_MSP(void)
  205. {
  206. __ASM("mrs r0, msp");
  207. __ASM("bx lr");
  208. }
  209. /**
  210. * @brief Set the Main Stack Pointer
  211. *
  212. * @param topOfMainStack Main Stack Pointer
  213. *
  214. * Assign the value mainStackPointer to the MSP
  215. * (main stack pointer) Cortex processor register
  216. */
  217. void __set_MSP(uint32_t topOfMainStack)
  218. {
  219. __ASM("msr msp, r0");
  220. __ASM("bx lr");
  221. }
  222. /**
  223. * @brief Reverse byte order in unsigned short value
  224. *
  225. * @param value value to reverse
  226. * @return reversed value
  227. *
  228. * Reverse byte order in unsigned short value
  229. */
  230. uint32_t __REV16(uint16_t value)
  231. {
  232. __ASM("rev16 r0, r0");
  233. __ASM("bx lr");
  234. }
  235. #pragma diag_default=Pe940
  236. #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
  237. /* GNU gcc specific functions */
  238. /**
  239. * @brief Return the Process Stack Pointer
  240. *
  241. * @return ProcessStackPointer
  242. *
  243. * Return the actual process stack pointer
  244. */
  245. uint32_t __get_PSP(void) __attribute__( ( naked ) );
  246. uint32_t __get_PSP(void)
  247. {
  248. uint32_t result=0;
  249. __ASM volatile ("MRS %0, psp\n\t"
  250. "MOV r0, %0 \n\t"
  251. "BX lr \n\t" : "=r" (result) );
  252. return(result);
  253. }
  254. /**
  255. * @brief Set the Process Stack Pointer
  256. *
  257. * @param topOfProcStack Process Stack Pointer
  258. *
  259. * Assign the value ProcessStackPointer to the MSP
  260. * (process stack pointer) Cortex processor register
  261. */
  262. void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
  263. void __set_PSP(uint32_t topOfProcStack)
  264. {
  265. __ASM volatile ("MSR psp, %0\n\t"
  266. "BX lr \n\t" : : "r" (topOfProcStack) );
  267. }
  268. /**
  269. * @brief Return the Main Stack Pointer
  270. *
  271. * @return Main Stack Pointer
  272. *
  273. * Return the current value of the MSP (main stack pointer)
  274. * Cortex processor register
  275. */
  276. uint32_t __get_MSP(void) __attribute__( ( naked ) );
  277. uint32_t __get_MSP(void)
  278. {
  279. uint32_t result=0;
  280. __ASM volatile ("MRS %0, msp\n\t"
  281. "MOV r0, %0 \n\t"
  282. "BX lr \n\t" : "=r" (result) );
  283. return(result);
  284. }
  285. /**
  286. * @brief Set the Main Stack Pointer
  287. *
  288. * @param topOfMainStack Main Stack Pointer
  289. *
  290. * Assign the value mainStackPointer to the MSP
  291. * (main stack pointer) Cortex processor register
  292. */
  293. void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
  294. void __set_MSP(uint32_t topOfMainStack)
  295. {
  296. __ASM volatile ("MSR msp, %0\n\t"
  297. "BX lr \n\t" : : "r" (topOfMainStack) );
  298. }
  299. /**
  300. * @brief Return the Priority Mask value
  301. *
  302. * @return PriMask
  303. *
  304. * Return state of the priority mask bit from the priority mask register
  305. */
  306. uint32_t __get_PRIMASK(void)
  307. {
  308. uint32_t result=0;
  309. __ASM volatile ("MRS %0, primask" : "=r" (result) );
  310. return(result);
  311. }
  312. /**
  313. * @brief Set the Priority Mask value
  314. *
  315. * @param priMask PriMask
  316. *
  317. * Set the priority mask bit in the priority mask register
  318. */
  319. void __set_PRIMASK(uint32_t priMask)
  320. {
  321. __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
  322. }
  323. /**
  324. * @brief Return the Control Register value
  325. *
  326. * @return Control value
  327. *
  328. * Return the content of the control register
  329. */
  330. uint32_t __get_CONTROL(void)
  331. {
  332. uint32_t result=0;
  333. __ASM volatile ("MRS %0, control" : "=r" (result) );
  334. return(result);
  335. }
  336. /**
  337. * @brief Set the Control Register value
  338. *
  339. * @param control Control value
  340. *
  341. * Set the control register
  342. */
  343. void __set_CONTROL(uint32_t control)
  344. {
  345. __ASM volatile ("MSR control, %0" : : "r" (control) );
  346. }
  347. /**
  348. * @brief Reverse byte order in integer value
  349. *
  350. * @param value value to reverse
  351. * @return reversed value
  352. *
  353. * Reverse byte order in integer value
  354. */
  355. uint32_t __REV(uint32_t value)
  356. {
  357. uint32_t result=0;
  358. __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
  359. return(result);
  360. }
  361. /**
  362. * @brief Reverse byte order in unsigned short value
  363. *
  364. * @param value value to reverse
  365. * @return reversed value
  366. *
  367. * Reverse byte order in unsigned short value
  368. */
  369. uint32_t __REV16(uint16_t value)
  370. {
  371. uint32_t result=0;
  372. __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
  373. return(result);
  374. }
  375. /**
  376. * @brief Reverse byte order in signed short value with sign extension to integer
  377. *
  378. * @param value value to reverse
  379. * @return reversed value
  380. *
  381. * Reverse byte order in signed short value with sign extension to integer
  382. */
  383. int32_t __REVSH(int16_t value)
  384. {
  385. uint32_t result=0;
  386. __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
  387. return(result);
  388. }
  389. #elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
  390. /* TASKING carm specific functions */
  391. /*
  392. * The CMSIS functions have been implemented as intrinsics in the compiler.
  393. * Please use "carm -?i" to get an up to date list of all instrinsics,
  394. * Including the CMSIS ones.
  395. */
  396. #endif