A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_pid_init_q31.c
  9. *
  10. * Description: Q31 PID Control initialization function
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * ------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @addtogroup PID
  43. * @{
  44. */
  45. /**
  46. * @brief Initialization function for the Q31 PID Control.
  47. * @param[in,out] *S points to an instance of the Q31 PID structure.
  48. * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
  49. * @return none.
  50. * \par Description:
  51. * \par
  52. * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
  53. * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
  54. * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
  55. * also sets the state variables to all zeros.
  56. */
  57. void arm_pid_init_q31(
  58. arm_pid_instance_q31 * S,
  59. int32_t resetStateFlag)
  60. {
  61. #ifndef ARM_MATH_CM0_FAMILY
  62. /* Run the below code for Cortex-M4 and Cortex-M3 */
  63. /* Derived coefficient A0 */
  64. S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
  65. /* Derived coefficient A1 */
  66. S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
  67. #else
  68. /* Run the below code for Cortex-M0 */
  69. q31_t temp;
  70. /* Derived coefficient A0 */
  71. temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
  72. S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
  73. /* Derived coefficient A1 */
  74. temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
  75. S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
  76. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  77. /* Derived coefficient A2 */
  78. S->A2 = S->Kd;
  79. /* Check whether state needs reset or not */
  80. if(resetStateFlag)
  81. {
  82. /* Clear the state buffer. The size will be always 3 samples */
  83. memset(S->state, 0, 3u * sizeof(q31_t));
  84. }
  85. }
  86. /**
  87. * @} end of PID group
  88. */