A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_cmplx_mult_real_q15.c
  9. *
  10. * Description: Q15 complex by real multiplication
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupCmplxMath
  43. */
  44. /**
  45. * @addtogroup CmplxByRealMult
  46. * @{
  47. */
  48. /**
  49. * @brief Q15 complex-by-real multiplication
  50. * @param[in] *pSrcCmplx points to the complex input vector
  51. * @param[in] *pSrcReal points to the real input vector
  52. * @param[out] *pCmplxDst points to the complex output vector
  53. * @param[in] numSamples number of samples in each vector
  54. * @return none.
  55. *
  56. * <b>Scaling and Overflow Behavior:</b>
  57. * \par
  58. * The function uses saturating arithmetic.
  59. * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
  60. */
  61. void arm_cmplx_mult_real_q15(
  62. q15_t * pSrcCmplx,
  63. q15_t * pSrcReal,
  64. q15_t * pCmplxDst,
  65. uint32_t numSamples)
  66. {
  67. q15_t in; /* Temporary variable to store input value */
  68. #ifndef ARM_MATH_CM0_FAMILY
  69. /* Run the below code for Cortex-M4 and Cortex-M3 */
  70. uint32_t blkCnt; /* loop counters */
  71. q31_t inA1, inA2; /* Temporary variables to hold input data */
  72. q31_t inB1; /* Temporary variables to hold input data */
  73. q15_t out1, out2, out3, out4; /* Temporary variables to hold output data */
  74. q31_t mul1, mul2, mul3, mul4; /* Temporary variables to hold intermediate data */
  75. /* loop Unrolling */
  76. blkCnt = numSamples >> 2u;
  77. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  78. ** a second loop below computes the remaining 1 to 3 samples. */
  79. while(blkCnt > 0u)
  80. {
  81. /* C[2 * i] = A[2 * i] * B[i]. */
  82. /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
  83. /* read complex number both real and imaginary from complex input buffer */
  84. inA1 = *__SIMD32(pSrcCmplx)++;
  85. /* read two real values at a time from real input buffer */
  86. inB1 = *__SIMD32(pSrcReal)++;
  87. /* read complex number both real and imaginary from complex input buffer */
  88. inA2 = *__SIMD32(pSrcCmplx)++;
  89. /* multiply complex number with real numbers */
  90. #ifndef ARM_MATH_BIG_ENDIAN
  91. mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
  92. mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
  93. mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
  94. mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
  95. #else
  96. mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
  97. mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
  98. mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
  99. mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
  100. #endif // #ifndef ARM_MATH_BIG_ENDIAN
  101. /* saturate the result */
  102. out1 = (q15_t) __SSAT(mul1 >> 15u, 16);
  103. out2 = (q15_t) __SSAT(mul2 >> 15u, 16);
  104. out3 = (q15_t) __SSAT(mul3 >> 15u, 16);
  105. out4 = (q15_t) __SSAT(mul4 >> 15u, 16);
  106. /* pack real and imaginary outputs and store them to destination */
  107. *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
  108. *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
  109. inA1 = *__SIMD32(pSrcCmplx)++;
  110. inB1 = *__SIMD32(pSrcReal)++;
  111. inA2 = *__SIMD32(pSrcCmplx)++;
  112. #ifndef ARM_MATH_BIG_ENDIAN
  113. mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
  114. mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
  115. mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
  116. mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
  117. #else
  118. mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
  119. mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
  120. mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
  121. mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
  122. #endif // #ifndef ARM_MATH_BIG_ENDIAN
  123. out1 = (q15_t) __SSAT(mul1 >> 15u, 16);
  124. out2 = (q15_t) __SSAT(mul2 >> 15u, 16);
  125. out3 = (q15_t) __SSAT(mul3 >> 15u, 16);
  126. out4 = (q15_t) __SSAT(mul4 >> 15u, 16);
  127. *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
  128. *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
  129. /* Decrement the numSamples loop counter */
  130. blkCnt--;
  131. }
  132. /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
  133. ** No loop unrolling is used. */
  134. blkCnt = numSamples % 0x4u;
  135. while(blkCnt > 0u)
  136. {
  137. /* C[2 * i] = A[2 * i] * B[i]. */
  138. /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
  139. in = *pSrcReal++;
  140. /* store the result in the destination buffer. */
  141. *pCmplxDst++ =
  142. (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
  143. *pCmplxDst++ =
  144. (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
  145. /* Decrement the numSamples loop counter */
  146. blkCnt--;
  147. }
  148. #else
  149. /* Run the below code for Cortex-M0 */
  150. while(numSamples > 0u)
  151. {
  152. /* realOut = realA * realB. */
  153. /* imagOut = imagA * realB. */
  154. in = *pSrcReal++;
  155. /* store the result in the destination buffer. */
  156. *pCmplxDst++ =
  157. (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
  158. *pCmplxDst++ =
  159. (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
  160. /* Decrement the numSamples loop counter */
  161. numSamples--;
  162. }
  163. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  164. }
  165. /**
  166. * @} end of CmplxByRealMult group
  167. */