A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_cmplx_mult_cmplx_f32.c
  9. *
  10. * Description: Floating-point complex-by-complex multiplication
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupCmplxMath
  43. */
  44. /**
  45. * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
  46. *
  47. * Multiplies a complex vector by another complex vector and generates a complex result.
  48. * The data in the complex arrays is stored in an interleaved fashion
  49. * (real, imag, real, imag, ...).
  50. * The parameter <code>numSamples</code> represents the number of complex
  51. * samples processed. The complex arrays have a total of <code>2*numSamples</code>
  52. * real values.
  53. *
  54. * The underlying algorithm is used:
  55. *
  56. * <pre>
  57. * for(n=0; n<numSamples; n++) {
  58. * pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
  59. * pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
  60. * }
  61. * </pre>
  62. *
  63. * There are separate functions for floating-point, Q15, and Q31 data types.
  64. */
  65. /**
  66. * @addtogroup CmplxByCmplxMult
  67. * @{
  68. */
  69. /**
  70. * @brief Floating-point complex-by-complex multiplication
  71. * @param[in] *pSrcA points to the first input vector
  72. * @param[in] *pSrcB points to the second input vector
  73. * @param[out] *pDst points to the output vector
  74. * @param[in] numSamples number of complex samples in each vector
  75. * @return none.
  76. */
  77. void arm_cmplx_mult_cmplx_f32(
  78. float32_t * pSrcA,
  79. float32_t * pSrcB,
  80. float32_t * pDst,
  81. uint32_t numSamples)
  82. {
  83. float32_t a1, b1, c1, d1; /* Temporary variables to store real and imaginary values */
  84. uint32_t blkCnt; /* loop counters */
  85. #ifndef ARM_MATH_CM0_FAMILY
  86. /* Run the below code for Cortex-M4 and Cortex-M3 */
  87. float32_t a2, b2, c2, d2; /* Temporary variables to store real and imaginary values */
  88. float32_t acc1, acc2, acc3, acc4;
  89. /* loop Unrolling */
  90. blkCnt = numSamples >> 2u;
  91. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  92. ** a second loop below computes the remaining 1 to 3 samples. */
  93. while(blkCnt > 0u)
  94. {
  95. /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
  96. /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
  97. a1 = *pSrcA; /* A[2 * i] */
  98. c1 = *pSrcB; /* B[2 * i] */
  99. b1 = *(pSrcA + 1); /* A[2 * i + 1] */
  100. acc1 = a1 * c1; /* acc1 = A[2 * i] * B[2 * i] */
  101. a2 = *(pSrcA + 2); /* A[2 * i + 2] */
  102. acc2 = (b1 * c1); /* acc2 = A[2 * i + 1] * B[2 * i] */
  103. d1 = *(pSrcB + 1); /* B[2 * i + 1] */
  104. c2 = *(pSrcB + 2); /* B[2 * i + 2] */
  105. acc1 -= b1 * d1; /* acc1 = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
  106. d2 = *(pSrcB + 3); /* B[2 * i + 3] */
  107. acc3 = a2 * c2; /* acc3 = A[2 * i + 2] * B[2 * i + 2] */
  108. b2 = *(pSrcA + 3); /* A[2 * i + 3] */
  109. acc2 += (a1 * d1); /* acc2 = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
  110. a1 = *(pSrcA + 4); /* A[2 * i + 4] */
  111. acc4 = (a2 * d2); /* acc4 = A[2 * i + 2] * B[2 * i + 3] */
  112. c1 = *(pSrcB + 4); /* B[2 * i + 4] */
  113. acc3 -= (b2 * d2); /* acc3 = A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */
  114. *pDst = acc1; /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
  115. b1 = *(pSrcA + 5); /* A[2 * i + 5] */
  116. acc4 += b2 * c2; /* acc4 = A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */
  117. *(pDst + 1) = acc2; /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
  118. acc1 = (a1 * c1);
  119. d1 = *(pSrcB + 5);
  120. acc2 = (b1 * c1);
  121. *(pDst + 2) = acc3;
  122. *(pDst + 3) = acc4;
  123. a2 = *(pSrcA + 6);
  124. acc1 -= (b1 * d1);
  125. c2 = *(pSrcB + 6);
  126. acc2 += (a1 * d1);
  127. b2 = *(pSrcA + 7);
  128. acc3 = (a2 * c2);
  129. d2 = *(pSrcB + 7);
  130. acc4 = (b2 * c2);
  131. *(pDst + 4) = acc1;
  132. pSrcA += 8u;
  133. acc3 -= (b2 * d2);
  134. acc4 += (a2 * d2);
  135. *(pDst + 5) = acc2;
  136. pSrcB += 8u;
  137. *(pDst + 6) = acc3;
  138. *(pDst + 7) = acc4;
  139. pDst += 8u;
  140. /* Decrement the numSamples loop counter */
  141. blkCnt--;
  142. }
  143. /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
  144. ** No loop unrolling is used. */
  145. blkCnt = numSamples % 0x4u;
  146. #else
  147. /* Run the below code for Cortex-M0 */
  148. blkCnt = numSamples;
  149. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  150. while(blkCnt > 0u)
  151. {
  152. /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
  153. /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
  154. a1 = *pSrcA++;
  155. b1 = *pSrcA++;
  156. c1 = *pSrcB++;
  157. d1 = *pSrcB++;
  158. /* store the result in the destination buffer. */
  159. *pDst++ = (a1 * c1) - (b1 * d1);
  160. *pDst++ = (a1 * d1) + (b1 * c1);
  161. /* Decrement the numSamples loop counter */
  162. blkCnt--;
  163. }
  164. }
  165. /**
  166. * @} end of CmplxByCmplxMult group
  167. */