A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_cmplx_mag_squared_q31.c
  9. *
  10. * Description: Q31 complex magnitude squared.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * ---------------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupCmplxMath
  43. */
  44. /**
  45. * @addtogroup cmplx_mag_squared
  46. * @{
  47. */
  48. /**
  49. * @brief Q31 complex magnitude squared
  50. * @param *pSrc points to the complex input vector
  51. * @param *pDst points to the real output vector
  52. * @param numSamples number of complex samples in the input vector
  53. * @return none.
  54. *
  55. * <b>Scaling and Overflow Behavior:</b>
  56. * \par
  57. * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
  58. * Input down scaling is not required.
  59. */
  60. void arm_cmplx_mag_squared_q31(
  61. q31_t * pSrc,
  62. q31_t * pDst,
  63. uint32_t numSamples)
  64. {
  65. q31_t real, imag; /* Temporary variables to store real and imaginary values */
  66. q31_t acc0, acc1; /* Accumulators */
  67. #ifndef ARM_MATH_CM0_FAMILY
  68. /* Run the below code for Cortex-M4 and Cortex-M3 */
  69. uint32_t blkCnt; /* loop counter */
  70. /* loop Unrolling */
  71. blkCnt = numSamples >> 2u;
  72. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  73. ** a second loop below computes the remaining 1 to 3 samples. */
  74. while(blkCnt > 0u)
  75. {
  76. /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
  77. real = *pSrc++;
  78. imag = *pSrc++;
  79. acc0 = (q31_t) (((q63_t) real * real) >> 33);
  80. acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
  81. /* store the result in 3.29 format in the destination buffer. */
  82. *pDst++ = acc0 + acc1;
  83. real = *pSrc++;
  84. imag = *pSrc++;
  85. acc0 = (q31_t) (((q63_t) real * real) >> 33);
  86. acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
  87. /* store the result in 3.29 format in the destination buffer. */
  88. *pDst++ = acc0 + acc1;
  89. real = *pSrc++;
  90. imag = *pSrc++;
  91. acc0 = (q31_t) (((q63_t) real * real) >> 33);
  92. acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
  93. /* store the result in 3.29 format in the destination buffer. */
  94. *pDst++ = acc0 + acc1;
  95. real = *pSrc++;
  96. imag = *pSrc++;
  97. acc0 = (q31_t) (((q63_t) real * real) >> 33);
  98. acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
  99. /* store the result in 3.29 format in the destination buffer. */
  100. *pDst++ = acc0 + acc1;
  101. /* Decrement the loop counter */
  102. blkCnt--;
  103. }
  104. /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
  105. ** No loop unrolling is used. */
  106. blkCnt = numSamples % 0x4u;
  107. while(blkCnt > 0u)
  108. {
  109. /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
  110. real = *pSrc++;
  111. imag = *pSrc++;
  112. acc0 = (q31_t) (((q63_t) real * real) >> 33);
  113. acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
  114. /* store the result in 3.29 format in the destination buffer. */
  115. *pDst++ = acc0 + acc1;
  116. /* Decrement the loop counter */
  117. blkCnt--;
  118. }
  119. #else
  120. /* Run the below code for Cortex-M0 */
  121. while(numSamples > 0u)
  122. {
  123. /* out = ((real * real) + (imag * imag)) */
  124. real = *pSrc++;
  125. imag = *pSrc++;
  126. acc0 = (q31_t) (((q63_t) real * real) >> 33);
  127. acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
  128. /* store the result in 3.29 format in the destination buffer. */
  129. *pDst++ = acc0 + acc1;
  130. /* Decrement the loop counter */
  131. numSamples--;
  132. }
  133. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  134. }
  135. /**
  136. * @} end of cmplx_mag_squared group
  137. */