A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_cmplx_mag_f32.c
  9. *
  10. * Description: Floating-point complex magnitude.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * ---------------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupCmplxMath
  43. */
  44. /**
  45. * @defgroup cmplx_mag Complex Magnitude
  46. *
  47. * Computes the magnitude of the elements of a complex data vector.
  48. *
  49. * The <code>pSrc</code> points to the source data and
  50. * <code>pDst</code> points to the where the result should be written.
  51. * <code>numSamples</code> specifies the number of complex samples
  52. * in the input array and the data is stored in an interleaved fashion
  53. * (real, imag, real, imag, ...).
  54. * The input array has a total of <code>2*numSamples</code> values;
  55. * the output array has a total of <code>numSamples</code> values.
  56. * The underlying algorithm is used:
  57. *
  58. * <pre>
  59. * for(n=0; n<numSamples; n++) {
  60. * pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
  61. * }
  62. * </pre>
  63. *
  64. * There are separate functions for floating-point, Q15, and Q31 data types.
  65. */
  66. /**
  67. * @addtogroup cmplx_mag
  68. * @{
  69. */
  70. /**
  71. * @brief Floating-point complex magnitude.
  72. * @param[in] *pSrc points to complex input buffer
  73. * @param[out] *pDst points to real output buffer
  74. * @param[in] numSamples number of complex samples in the input vector
  75. * @return none.
  76. *
  77. */
  78. void arm_cmplx_mag_f32(
  79. float32_t * pSrc,
  80. float32_t * pDst,
  81. uint32_t numSamples)
  82. {
  83. float32_t realIn, imagIn; /* Temporary variables to hold input values */
  84. #ifndef ARM_MATH_CM0_FAMILY
  85. /* Run the below code for Cortex-M4 and Cortex-M3 */
  86. uint32_t blkCnt; /* loop counter */
  87. /*loop Unrolling */
  88. blkCnt = numSamples >> 2u;
  89. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  90. ** a second loop below computes the remaining 1 to 3 samples. */
  91. while(blkCnt > 0u)
  92. {
  93. /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
  94. realIn = *pSrc++;
  95. imagIn = *pSrc++;
  96. /* store the result in the destination buffer. */
  97. arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
  98. realIn = *pSrc++;
  99. imagIn = *pSrc++;
  100. arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
  101. realIn = *pSrc++;
  102. imagIn = *pSrc++;
  103. arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
  104. realIn = *pSrc++;
  105. imagIn = *pSrc++;
  106. arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
  107. /* Decrement the loop counter */
  108. blkCnt--;
  109. }
  110. /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
  111. ** No loop unrolling is used. */
  112. blkCnt = numSamples % 0x4u;
  113. while(blkCnt > 0u)
  114. {
  115. /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
  116. realIn = *pSrc++;
  117. imagIn = *pSrc++;
  118. /* store the result in the destination buffer. */
  119. arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
  120. /* Decrement the loop counter */
  121. blkCnt--;
  122. }
  123. #else
  124. /* Run the below code for Cortex-M0 */
  125. while(numSamples > 0u)
  126. {
  127. /* out = sqrt((real * real) + (imag * imag)) */
  128. realIn = *pSrc++;
  129. imagIn = *pSrc++;
  130. /* store the result in the destination buffer. */
  131. arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
  132. /* Decrement the loop counter */
  133. numSamples--;
  134. }
  135. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  136. }
  137. /**
  138. * @} end of cmplx_mag group
  139. */