A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_cmplx_conj_q15.c
  9. *
  10. * Description: Q15 complex conjugate.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * ---------------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupCmplxMath
  43. */
  44. /**
  45. * @addtogroup cmplx_conj
  46. * @{
  47. */
  48. /**
  49. * @brief Q15 complex conjugate.
  50. * @param *pSrc points to the input vector
  51. * @param *pDst points to the output vector
  52. * @param numSamples number of complex samples in each vector
  53. * @return none.
  54. *
  55. * <b>Scaling and Overflow Behavior:</b>
  56. * \par
  57. * The function uses saturating arithmetic.
  58. * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
  59. */
  60. void arm_cmplx_conj_q15(
  61. q15_t * pSrc,
  62. q15_t * pDst,
  63. uint32_t numSamples)
  64. {
  65. #ifndef ARM_MATH_CM0_FAMILY
  66. /* Run the below code for Cortex-M4 and Cortex-M3 */
  67. uint32_t blkCnt; /* loop counter */
  68. q31_t in1, in2, in3, in4;
  69. q31_t zero = 0;
  70. /*loop Unrolling */
  71. blkCnt = numSamples >> 2u;
  72. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  73. ** a second loop below computes the remaining 1 to 3 samples. */
  74. while(blkCnt > 0u)
  75. {
  76. /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
  77. /* Calculate Complex Conjugate and then store the results in the destination buffer. */
  78. in1 = *__SIMD32(pSrc)++;
  79. in2 = *__SIMD32(pSrc)++;
  80. in3 = *__SIMD32(pSrc)++;
  81. in4 = *__SIMD32(pSrc)++;
  82. #ifndef ARM_MATH_BIG_ENDIAN
  83. in1 = __QASX(zero, in1);
  84. in2 = __QASX(zero, in2);
  85. in3 = __QASX(zero, in3);
  86. in4 = __QASX(zero, in4);
  87. #else
  88. in1 = __QSAX(zero, in1);
  89. in2 = __QSAX(zero, in2);
  90. in3 = __QSAX(zero, in3);
  91. in4 = __QSAX(zero, in4);
  92. #endif // #ifndef ARM_MATH_BIG_ENDIAN
  93. in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16);
  94. in2 = ((uint32_t) in2 >> 16) | ((uint32_t) in2 << 16);
  95. in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16);
  96. in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16);
  97. *__SIMD32(pDst)++ = in1;
  98. *__SIMD32(pDst)++ = in2;
  99. *__SIMD32(pDst)++ = in3;
  100. *__SIMD32(pDst)++ = in4;
  101. /* Decrement the loop counter */
  102. blkCnt--;
  103. }
  104. /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
  105. ** No loop unrolling is used. */
  106. blkCnt = numSamples % 0x4u;
  107. while(blkCnt > 0u)
  108. {
  109. /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
  110. /* Calculate Complex Conjugate and then store the results in the destination buffer. */
  111. *pDst++ = *pSrc++;
  112. *pDst++ = __SSAT(-*pSrc++, 16);
  113. /* Decrement the loop counter */
  114. blkCnt--;
  115. }
  116. #else
  117. q15_t in;
  118. /* Run the below code for Cortex-M0 */
  119. while(numSamples > 0u)
  120. {
  121. /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
  122. /* Calculate Complex Conjugate and then store the results in the destination buffer. */
  123. *pDst++ = *pSrc++;
  124. in = *pSrc++;
  125. *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
  126. /* Decrement the loop counter */
  127. numSamples--;
  128. }
  129. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  130. }
  131. /**
  132. * @} end of cmplx_conj group
  133. */