A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_negate_q15.c
  9. *
  10. * Description: Negates Q15 vectors.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupMath
  43. */
  44. /**
  45. * @addtogroup negate
  46. * @{
  47. */
  48. /**
  49. * @brief Negates the elements of a Q15 vector.
  50. * @param[in] *pSrc points to the input vector
  51. * @param[out] *pDst points to the output vector
  52. * @param[in] blockSize number of samples in the vector
  53. * @return none.
  54. *
  55. * \par Conditions for optimum performance
  56. * Input and output buffers should be aligned by 32-bit
  57. *
  58. *
  59. * <b>Scaling and Overflow Behavior:</b>
  60. * \par
  61. * The function uses saturating arithmetic.
  62. * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
  63. */
  64. void arm_negate_q15(
  65. q15_t * pSrc,
  66. q15_t * pDst,
  67. uint32_t blockSize)
  68. {
  69. uint32_t blkCnt; /* loop counter */
  70. q15_t in;
  71. #ifndef ARM_MATH_CM0_FAMILY
  72. /* Run the below code for Cortex-M4 and Cortex-M3 */
  73. q31_t in1, in2; /* Temporary variables */
  74. /*loop Unrolling */
  75. blkCnt = blockSize >> 2u;
  76. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  77. ** a second loop below computes the remaining 1 to 3 samples. */
  78. while(blkCnt > 0u)
  79. {
  80. /* C = -A */
  81. /* Read two inputs at a time */
  82. in1 = _SIMD32_OFFSET(pSrc);
  83. in2 = _SIMD32_OFFSET(pSrc + 2);
  84. /* negate two samples at a time */
  85. in1 = __QSUB16(0, in1);
  86. /* negate two samples at a time */
  87. in2 = __QSUB16(0, in2);
  88. /* store the result to destination 2 samples at a time */
  89. _SIMD32_OFFSET(pDst) = in1;
  90. /* store the result to destination 2 samples at a time */
  91. _SIMD32_OFFSET(pDst + 2) = in2;
  92. /* update pointers to process next samples */
  93. pSrc += 4u;
  94. pDst += 4u;
  95. /* Decrement the loop counter */
  96. blkCnt--;
  97. }
  98. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  99. ** No loop unrolling is used. */
  100. blkCnt = blockSize % 0x4u;
  101. #else
  102. /* Run the below code for Cortex-M0 */
  103. /* Initialize blkCnt with number of samples */
  104. blkCnt = blockSize;
  105. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  106. while(blkCnt > 0u)
  107. {
  108. /* C = -A */
  109. /* Negate and then store the result in the destination buffer. */
  110. in = *pSrc++;
  111. *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
  112. /* Decrement the loop counter */
  113. blkCnt--;
  114. }
  115. }
  116. /**
  117. * @} end of negate group
  118. */