A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_mult_q31.c
  9. *
  10. * Description: Q31 vector multiplication.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupMath
  43. */
  44. /**
  45. * @addtogroup BasicMult
  46. * @{
  47. */
  48. /**
  49. * @brief Q31 vector multiplication.
  50. * @param[in] *pSrcA points to the first input vector
  51. * @param[in] *pSrcB points to the second input vector
  52. * @param[out] *pDst points to the output vector
  53. * @param[in] blockSize number of samples in each vector
  54. * @return none.
  55. *
  56. * <b>Scaling and Overflow Behavior:</b>
  57. * \par
  58. * The function uses saturating arithmetic.
  59. * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
  60. */
  61. void arm_mult_q31(
  62. q31_t * pSrcA,
  63. q31_t * pSrcB,
  64. q31_t * pDst,
  65. uint32_t blockSize)
  66. {
  67. uint32_t blkCnt; /* loop counters */
  68. #ifndef ARM_MATH_CM0_FAMILY
  69. /* Run the below code for Cortex-M4 and Cortex-M3 */
  70. q31_t inA1, inA2, inA3, inA4; /* temporary input variables */
  71. q31_t inB1, inB2, inB3, inB4; /* temporary input variables */
  72. q31_t out1, out2, out3, out4; /* temporary output variables */
  73. /* loop Unrolling */
  74. blkCnt = blockSize >> 2u;
  75. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  76. ** a second loop below computes the remaining 1 to 3 samples. */
  77. while(blkCnt > 0u)
  78. {
  79. /* C = A * B */
  80. /* Multiply the inputs and then store the results in the destination buffer. */
  81. inA1 = *pSrcA++;
  82. inA2 = *pSrcA++;
  83. inA3 = *pSrcA++;
  84. inA4 = *pSrcA++;
  85. inB1 = *pSrcB++;
  86. inB2 = *pSrcB++;
  87. inB3 = *pSrcB++;
  88. inB4 = *pSrcB++;
  89. out1 = ((q63_t) inA1 * inB1) >> 32;
  90. out2 = ((q63_t) inA2 * inB2) >> 32;
  91. out3 = ((q63_t) inA3 * inB3) >> 32;
  92. out4 = ((q63_t) inA4 * inB4) >> 32;
  93. out1 = __SSAT(out1, 31);
  94. out2 = __SSAT(out2, 31);
  95. out3 = __SSAT(out3, 31);
  96. out4 = __SSAT(out4, 31);
  97. *pDst++ = out1 << 1u;
  98. *pDst++ = out2 << 1u;
  99. *pDst++ = out3 << 1u;
  100. *pDst++ = out4 << 1u;
  101. /* Decrement the blockSize loop counter */
  102. blkCnt--;
  103. }
  104. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  105. ** No loop unrolling is used. */
  106. blkCnt = blockSize % 0x4u;
  107. while(blkCnt > 0u)
  108. {
  109. /* C = A * B */
  110. /* Multiply the inputs and then store the results in the destination buffer. */
  111. inA1 = *pSrcA++;
  112. inB1 = *pSrcB++;
  113. out1 = ((q63_t) inA1 * inB1) >> 32;
  114. out1 = __SSAT(out1, 31);
  115. *pDst++ = out1 << 1u;
  116. /* Decrement the blockSize loop counter */
  117. blkCnt--;
  118. }
  119. #else
  120. /* Run the below code for Cortex-M0 */
  121. /* Initialize blkCnt with number of samples */
  122. blkCnt = blockSize;
  123. while(blkCnt > 0u)
  124. {
  125. /* C = A * B */
  126. /* Multiply the inputs and then store the results in the destination buffer. */
  127. *pDst++ =
  128. (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
  129. /* Decrement the blockSize loop counter */
  130. blkCnt--;
  131. }
  132. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  133. }
  134. /**
  135. * @} end of BasicMult group
  136. */