A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_mult_f32.c
  9. *
  10. * Description: Floating-point vector multiplication.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupMath
  43. */
  44. /**
  45. * @defgroup BasicMult Vector Multiplication
  46. *
  47. * Element-by-element multiplication of two vectors.
  48. *
  49. * <pre>
  50. * pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
  51. * </pre>
  52. *
  53. * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  54. */
  55. /**
  56. * @addtogroup BasicMult
  57. * @{
  58. */
  59. /**
  60. * @brief Floating-point vector multiplication.
  61. * @param[in] *pSrcA points to the first input vector
  62. * @param[in] *pSrcB points to the second input vector
  63. * @param[out] *pDst points to the output vector
  64. * @param[in] blockSize number of samples in each vector
  65. * @return none.
  66. */
  67. void arm_mult_f32(
  68. float32_t * pSrcA,
  69. float32_t * pSrcB,
  70. float32_t * pDst,
  71. uint32_t blockSize)
  72. {
  73. uint32_t blkCnt; /* loop counters */
  74. #ifndef ARM_MATH_CM0_FAMILY
  75. /* Run the below code for Cortex-M4 and Cortex-M3 */
  76. float32_t inA1, inA2, inA3, inA4; /* temporary input variables */
  77. float32_t inB1, inB2, inB3, inB4; /* temporary input variables */
  78. float32_t out1, out2, out3, out4; /* temporary output variables */
  79. /* loop Unrolling */
  80. blkCnt = blockSize >> 2u;
  81. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  82. ** a second loop below computes the remaining 1 to 3 samples. */
  83. while(blkCnt > 0u)
  84. {
  85. /* C = A * B */
  86. /* Multiply the inputs and store the results in output buffer */
  87. /* read sample from sourceA */
  88. inA1 = *pSrcA;
  89. /* read sample from sourceB */
  90. inB1 = *pSrcB;
  91. /* read sample from sourceA */
  92. inA2 = *(pSrcA + 1);
  93. /* read sample from sourceB */
  94. inB2 = *(pSrcB + 1);
  95. /* out = sourceA * sourceB */
  96. out1 = inA1 * inB1;
  97. /* read sample from sourceA */
  98. inA3 = *(pSrcA + 2);
  99. /* read sample from sourceB */
  100. inB3 = *(pSrcB + 2);
  101. /* out = sourceA * sourceB */
  102. out2 = inA2 * inB2;
  103. /* read sample from sourceA */
  104. inA4 = *(pSrcA + 3);
  105. /* store result to destination buffer */
  106. *pDst = out1;
  107. /* read sample from sourceB */
  108. inB4 = *(pSrcB + 3);
  109. /* out = sourceA * sourceB */
  110. out3 = inA3 * inB3;
  111. /* store result to destination buffer */
  112. *(pDst + 1) = out2;
  113. /* out = sourceA * sourceB */
  114. out4 = inA4 * inB4;
  115. /* store result to destination buffer */
  116. *(pDst + 2) = out3;
  117. /* store result to destination buffer */
  118. *(pDst + 3) = out4;
  119. /* update pointers to process next samples */
  120. pSrcA += 4u;
  121. pSrcB += 4u;
  122. pDst += 4u;
  123. /* Decrement the blockSize loop counter */
  124. blkCnt--;
  125. }
  126. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  127. ** No loop unrolling is used. */
  128. blkCnt = blockSize % 0x4u;
  129. #else
  130. /* Run the below code for Cortex-M0 */
  131. /* Initialize blkCnt with number of samples */
  132. blkCnt = blockSize;
  133. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  134. while(blkCnt > 0u)
  135. {
  136. /* C = A * B */
  137. /* Multiply the inputs and store the results in output buffer */
  138. *pDst++ = (*pSrcA++) * (*pSrcB++);
  139. /* Decrement the blockSize loop counter */
  140. blkCnt--;
  141. }
  142. }
  143. /**
  144. * @} end of BasicMult group
  145. */