A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_dot_prod_q15.c
  9. *
  10. * Description: Q15 dot product.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupMath
  43. */
  44. /**
  45. * @addtogroup dot_prod
  46. * @{
  47. */
  48. /**
  49. * @brief Dot product of Q15 vectors.
  50. * @param[in] *pSrcA points to the first input vector
  51. * @param[in] *pSrcB points to the second input vector
  52. * @param[in] blockSize number of samples in each vector
  53. * @param[out] *result output result returned here
  54. * @return none.
  55. *
  56. * <b>Scaling and Overflow Behavior:</b>
  57. * \par
  58. * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
  59. * results are added to a 64-bit accumulator in 34.30 format.
  60. * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
  61. * there is no risk of overflow.
  62. * The return result is in 34.30 format.
  63. */
  64. void arm_dot_prod_q15(
  65. q15_t * pSrcA,
  66. q15_t * pSrcB,
  67. uint32_t blockSize,
  68. q63_t * result)
  69. {
  70. q63_t sum = 0; /* Temporary result storage */
  71. uint32_t blkCnt; /* loop counter */
  72. #ifndef ARM_MATH_CM0_FAMILY
  73. /* Run the below code for Cortex-M4 and Cortex-M3 */
  74. /*loop Unrolling */
  75. blkCnt = blockSize >> 2u;
  76. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  77. ** a second loop below computes the remaining 1 to 3 samples. */
  78. while(blkCnt > 0u)
  79. {
  80. /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  81. /* Calculate dot product and then store the result in a temporary buffer. */
  82. sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
  83. sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
  84. /* Decrement the loop counter */
  85. blkCnt--;
  86. }
  87. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  88. ** No loop unrolling is used. */
  89. blkCnt = blockSize % 0x4u;
  90. while(blkCnt > 0u)
  91. {
  92. /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  93. /* Calculate dot product and then store the results in a temporary buffer. */
  94. sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
  95. /* Decrement the loop counter */
  96. blkCnt--;
  97. }
  98. #else
  99. /* Run the below code for Cortex-M0 */
  100. /* Initialize blkCnt with number of samples */
  101. blkCnt = blockSize;
  102. while(blkCnt > 0u)
  103. {
  104. /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  105. /* Calculate dot product and then store the results in a temporary buffer. */
  106. sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
  107. /* Decrement the loop counter */
  108. blkCnt--;
  109. }
  110. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  111. /* Store the result in the destination buffer in 34.30 format */
  112. *result = sum;
  113. }
  114. /**
  115. * @} end of dot_prod group
  116. */