A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_abs_q7.c
  9. *
  10. * Description: Q7 vector absolute value.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupMath
  43. */
  44. /**
  45. * @addtogroup BasicAbs
  46. * @{
  47. */
  48. /**
  49. * @brief Q7 vector absolute value.
  50. * @param[in] *pSrc points to the input buffer
  51. * @param[out] *pDst points to the output buffer
  52. * @param[in] blockSize number of samples in each vector
  53. * @return none.
  54. *
  55. * \par Conditions for optimum performance
  56. * Input and output buffers should be aligned by 32-bit
  57. *
  58. *
  59. * <b>Scaling and Overflow Behavior:</b>
  60. * \par
  61. * The function uses saturating arithmetic.
  62. * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
  63. */
  64. void arm_abs_q7(
  65. q7_t * pSrc,
  66. q7_t * pDst,
  67. uint32_t blockSize)
  68. {
  69. uint32_t blkCnt; /* loop counter */
  70. q7_t in; /* Input value1 */
  71. #ifndef ARM_MATH_CM0_FAMILY
  72. /* Run the below code for Cortex-M4 and Cortex-M3 */
  73. q31_t in1, in2, in3, in4; /* temporary input variables */
  74. q31_t out1, out2, out3, out4; /* temporary output variables */
  75. /*loop Unrolling */
  76. blkCnt = blockSize >> 2u;
  77. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  78. ** a second loop below computes the remaining 1 to 3 samples. */
  79. while(blkCnt > 0u)
  80. {
  81. /* C = |A| */
  82. /* Read inputs */
  83. in1 = (q31_t) * pSrc;
  84. in2 = (q31_t) * (pSrc + 1);
  85. in3 = (q31_t) * (pSrc + 2);
  86. /* find absolute value */
  87. out1 = (in1 > 0) ? in1 : (q31_t)__QSUB8(0, in1);
  88. /* read input */
  89. in4 = (q31_t) * (pSrc + 3);
  90. /* find absolute value */
  91. out2 = (in2 > 0) ? in2 : (q31_t)__QSUB8(0, in2);
  92. /* store result to destination */
  93. *pDst = (q7_t) out1;
  94. /* find absolute value */
  95. out3 = (in3 > 0) ? in3 : (q31_t)__QSUB8(0, in3);
  96. /* find absolute value */
  97. out4 = (in4 > 0) ? in4 : (q31_t)__QSUB8(0, in4);
  98. /* store result to destination */
  99. *(pDst + 1) = (q7_t) out2;
  100. /* store result to destination */
  101. *(pDst + 2) = (q7_t) out3;
  102. /* store result to destination */
  103. *(pDst + 3) = (q7_t) out4;
  104. /* update pointers to process next samples */
  105. pSrc += 4u;
  106. pDst += 4u;
  107. /* Decrement the loop counter */
  108. blkCnt--;
  109. }
  110. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  111. ** No loop unrolling is used. */
  112. blkCnt = blockSize % 0x4u;
  113. #else
  114. /* Run the below code for Cortex-M0 */
  115. blkCnt = blockSize;
  116. #endif // #define ARM_MATH_CM0_FAMILY
  117. while(blkCnt > 0u)
  118. {
  119. /* C = |A| */
  120. /* Read the input */
  121. in = *pSrc++;
  122. /* Store the Absolute result in the destination buffer */
  123. *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in);
  124. /* Decrement the loop counter */
  125. blkCnt--;
  126. }
  127. }
  128. /**
  129. * @} end of BasicAbs group
  130. */