A bundled STM32F10x Std Periph and CMSIS library
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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_abs_q15.c
  9. *
  10. * Description: Q15 vector absolute value.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupMath
  43. */
  44. /**
  45. * @addtogroup BasicAbs
  46. * @{
  47. */
  48. /**
  49. * @brief Q15 vector absolute value.
  50. * @param[in] *pSrc points to the input buffer
  51. * @param[out] *pDst points to the output buffer
  52. * @param[in] blockSize number of samples in each vector
  53. * @return none.
  54. *
  55. * <b>Scaling and Overflow Behavior:</b>
  56. * \par
  57. * The function uses saturating arithmetic.
  58. * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
  59. */
  60. void arm_abs_q15(
  61. q15_t * pSrc,
  62. q15_t * pDst,
  63. uint32_t blockSize)
  64. {
  65. uint32_t blkCnt; /* loop counter */
  66. #ifndef ARM_MATH_CM0_FAMILY
  67. __SIMD32_TYPE *simd;
  68. /* Run the below code for Cortex-M4 and Cortex-M3 */
  69. q15_t in1; /* Input value1 */
  70. q15_t in2; /* Input value2 */
  71. /*loop Unrolling */
  72. blkCnt = blockSize >> 2u;
  73. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  74. ** a second loop below computes the remaining 1 to 3 samples. */
  75. simd = __SIMD32_CONST(pDst);
  76. while(blkCnt > 0u)
  77. {
  78. /* C = |A| */
  79. /* Read two inputs */
  80. in1 = *pSrc++;
  81. in2 = *pSrc++;
  82. /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
  83. #ifndef ARM_MATH_BIG_ENDIAN
  84. *simd++ =
  85. __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
  86. ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
  87. #else
  88. *simd++ =
  89. __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
  90. ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
  91. #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
  92. in1 = *pSrc++;
  93. in2 = *pSrc++;
  94. #ifndef ARM_MATH_BIG_ENDIAN
  95. *simd++ =
  96. __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
  97. ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
  98. #else
  99. *simd++ =
  100. __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
  101. ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
  102. #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
  103. /* Decrement the loop counter */
  104. blkCnt--;
  105. }
  106. pDst = (q15_t *)simd;
  107. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  108. ** No loop unrolling is used. */
  109. blkCnt = blockSize % 0x4u;
  110. while(blkCnt > 0u)
  111. {
  112. /* C = |A| */
  113. /* Read the input */
  114. in1 = *pSrc++;
  115. /* Calculate absolute value of input and then store the result in the destination buffer. */
  116. *pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1);
  117. /* Decrement the loop counter */
  118. blkCnt--;
  119. }
  120. #else
  121. /* Run the below code for Cortex-M0 */
  122. q15_t in; /* Temporary input variable */
  123. /* Initialize blkCnt with number of samples */
  124. blkCnt = blockSize;
  125. while(blkCnt > 0u)
  126. {
  127. /* C = |A| */
  128. /* Read the input */
  129. in = *pSrc++;
  130. /* Calculate absolute value of input and then store the result in the destination buffer. */
  131. *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
  132. /* Decrement the loop counter */
  133. blkCnt--;
  134. }
  135. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  136. }
  137. /**
  138. * @} end of BasicAbs group
  139. */