A bundled STM32F10x Std Periph and CMSIS library
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arm_cmplx_mag_q31.c 5.7 KiB

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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_cmplx_mag_q31.c
  9. *
  10. * Description: Q31 complex magnitude
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * ---------------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupCmplxMath
  43. */
  44. /**
  45. * @addtogroup cmplx_mag
  46. * @{
  47. */
  48. /**
  49. * @brief Q31 complex magnitude
  50. * @param *pSrc points to the complex input vector
  51. * @param *pDst points to the real output vector
  52. * @param numSamples number of complex samples in the input vector
  53. * @return none.
  54. *
  55. * <b>Scaling and Overflow Behavior:</b>
  56. * \par
  57. * The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
  58. * Input down scaling is not required.
  59. */
  60. void arm_cmplx_mag_q31(
  61. q31_t * pSrc,
  62. q31_t * pDst,
  63. uint32_t numSamples)
  64. {
  65. q31_t real, imag; /* Temporary variables to hold input values */
  66. q31_t acc0, acc1; /* Accumulators */
  67. uint32_t blkCnt; /* loop counter */
  68. #ifndef ARM_MATH_CM0_FAMILY
  69. /* Run the below code for Cortex-M4 and Cortex-M3 */
  70. q31_t real1, real2, imag1, imag2; /* Temporary variables to hold input values */
  71. q31_t out1, out2, out3, out4; /* Accumulators */
  72. q63_t mul1, mul2, mul3, mul4; /* Temporary variables */
  73. /*loop Unrolling */
  74. blkCnt = numSamples >> 2u;
  75. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  76. ** a second loop below computes the remaining 1 to 3 samples. */
  77. while(blkCnt > 0u)
  78. {
  79. /* read complex input from source buffer */
  80. real1 = pSrc[0];
  81. imag1 = pSrc[1];
  82. real2 = pSrc[2];
  83. imag2 = pSrc[3];
  84. /* calculate power of input values */
  85. mul1 = (q63_t) real1 *real1;
  86. mul2 = (q63_t) imag1 *imag1;
  87. mul3 = (q63_t) real2 *real2;
  88. mul4 = (q63_t) imag2 *imag2;
  89. /* get the result to 3.29 format */
  90. out1 = (q31_t) (mul1 >> 33);
  91. out2 = (q31_t) (mul2 >> 33);
  92. out3 = (q31_t) (mul3 >> 33);
  93. out4 = (q31_t) (mul4 >> 33);
  94. /* add real and imaginary accumulators */
  95. out1 = out1 + out2;
  96. out3 = out3 + out4;
  97. /* read complex input from source buffer */
  98. real1 = pSrc[4];
  99. imag1 = pSrc[5];
  100. real2 = pSrc[6];
  101. imag2 = pSrc[7];
  102. /* calculate square root */
  103. arm_sqrt_q31(out1, &pDst[0]);
  104. /* calculate power of input values */
  105. mul1 = (q63_t) real1 *real1;
  106. /* calculate square root */
  107. arm_sqrt_q31(out3, &pDst[1]);
  108. /* calculate power of input values */
  109. mul2 = (q63_t) imag1 *imag1;
  110. mul3 = (q63_t) real2 *real2;
  111. mul4 = (q63_t) imag2 *imag2;
  112. /* get the result to 3.29 format */
  113. out1 = (q31_t) (mul1 >> 33);
  114. out2 = (q31_t) (mul2 >> 33);
  115. out3 = (q31_t) (mul3 >> 33);
  116. out4 = (q31_t) (mul4 >> 33);
  117. /* add real and imaginary accumulators */
  118. out1 = out1 + out2;
  119. out3 = out3 + out4;
  120. /* calculate square root */
  121. arm_sqrt_q31(out1, &pDst[2]);
  122. /* increment destination by 8 to process next samples */
  123. pSrc += 8u;
  124. /* calculate square root */
  125. arm_sqrt_q31(out3, &pDst[3]);
  126. /* increment destination by 4 to process next samples */
  127. pDst += 4u;
  128. /* Decrement the loop counter */
  129. blkCnt--;
  130. }
  131. /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
  132. ** No loop unrolling is used. */
  133. blkCnt = numSamples % 0x4u;
  134. #else
  135. /* Run the below code for Cortex-M0 */
  136. blkCnt = numSamples;
  137. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  138. while(blkCnt > 0u)
  139. {
  140. /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
  141. real = *pSrc++;
  142. imag = *pSrc++;
  143. acc0 = (q31_t) (((q63_t) real * real) >> 33);
  144. acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
  145. /* store the result in 2.30 format in the destination buffer. */
  146. arm_sqrt_q31(acc0 + acc1, pDst++);
  147. /* Decrement the loop counter */
  148. blkCnt--;
  149. }
  150. }
  151. /**
  152. * @} end of cmplx_mag group
  153. */